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Author SHA1 Message Date
bbracker
a93f36824d modify debug.sh to not rely on external GDB script 2022-03-07 11:56:04 -08:00
bbracker
74ff583f9b add debug.sh 2022-03-07 19:52:19 +00:00
Shreya Sanghai
b73f81548f removed reminant changes 2022-03-07 17:36:05 +00:00
Shreya Sanghai
b6b4d0f982 undid changes to synth script 2022-03-07 17:32:08 +00:00
Shreya Sanghai
31f17d2bf3 modified synth script to take config from outputdir 2022-03-07 17:12:43 +00:00
Shreya Sanghai
4d8e0ecf29 updated makefile to speed up synth 2022-03-07 00:09:18 +00:00
Shreya Sanghai
e4145d32ab modified makefile 2022-03-07 00:09:18 +00:00
bbracker
01eeab2131 update checkpointSweep in accordance to having removed trace parsing feature 2022-03-06 14:55:51 -08:00
bbracker
c432e2175e remove vestigial silencePipe mechanism 2022-03-06 14:54:35 -08:00
bbracker
ca6bb7c2d2 needed to initialize checkpoint directory 2022-03-06 14:51:25 -08:00
bbracker
6b1b471ca6 no longer use cythonization on python parser scripts because its a little complicated and has marginal benefit 2022-03-06 14:40:26 -08:00
bbracker
2e6fa01b9b give genCheckpoint the same de-sudo'ing treatement 2022-03-06 14:37:12 -08:00
bbracker
675e112950 better to use $tvDir variable rather than abs path 2022-03-06 14:33:53 -08:00
bbracker
8720604bfc replace sudo's with suggestions in genRecording.sh 2022-03-06 14:31:55 -08:00
bbracker
3e4ce15ea4 replace sudo's in genTrace.sh with suggested commands 2022-03-06 14:24:50 -08:00
bbracker
3e1f4decf1 small bugfix to suggested sudo commands for linux testvectors 2022-03-06 14:16:23 -08:00
bbracker
228f693f13 remove checkpoint trace generation since that requires qemu hacking and because we are able to generate the whole trace on VLSI 2022-03-06 14:04:30 -08:00
bbracker
12dd1fb8e3 add path to Modelsim on vlsi 2022-03-06 13:55:19 -08:00
bbracker
f86e76a4b1 recommend sudo commands without automatically executing them in genInitMem.sh 2022-03-06 13:30:19 -08:00
bbracker
a0d0742227 change from clang to gcc when compiling testvector-generation executables 2022-03-06 13:18:53 -08:00
bbracker
e2d2dbad10 generate $WALLY in a way that works for bash and zsh 2022-03-06 13:12:20 -08:00
bbracker
3601cc54ab Revert "fix "dirname: missing operand" bug from setup.sh" 
This reverts commit 34c460b451.
 2022-03-06 12:48:53 -08:00
David Harris
e757ed1162 Fixed merge of fpcalc 2022-03-06 13:32:13 +00:00
David Harris
d2282d5e87 Checked in fma16_template.v 2022-03-06 13:29:35 +00:00
bbracker
94124cb108 add extractFunctionRadix step to buildroot Makefile 2022-03-05 19:02:07 -08:00
bbracker
9f7a434b20 change genInitMem.sh to check for sufficient directory privileges rather than invoke sudo 2022-03-05 18:04:00 -08:00
bbracker
ddae5f6518 remove linux-testgen dir because it is now completely obsolete 2022-03-05 17:26:30 -08:00
bbracker
34c460b451 fix "dirname: missing operand" bug from setup.sh 2022-03-05 17:21:34 -08:00
David Harris
41e111a44f Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-03-04 07:21:22 -08:00
David Harris
dab04b46fe Cleaned up printing and warnings in fpcalc.c 2022-03-04 07:21:18 -08:00
David Harris
d24178aa34 Prettied up softfloat_demo 2022-03-04 05:16:20 +00:00
David Harris
f2bda069da Adjusted scripts to use 2022-03-04 05:09:02 +00:00
David Harris
1d3cd85d59 Defined WALLY in setup as pointer to repository 2022-03-03 21:00:07 -08:00
David Harris
9fd861a9ee removed more old 64priv tests 2022-03-04 03:57:19 +00:00
bbracker
51f1a411dd Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-04 00:12:00 +00:00
bbracker
1c5697874f comment out nonfunctioning CSR-PERMISSIONS-M test 2022-03-04 00:11:55 +00:00
David Harris
63e9d846e4 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-04 00:07:34 +00:00
David Harris
48705457d5 LSU/Cache code review notes 2022-03-04 00:07:31 +00:00
bbracker
efb5d1dbc0 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-04 00:06:27 +00:00
bbracker
443dd40ea8 remove imperas32p tests 2022-03-04 00:06:18 +00:00
David Harris
5e2587df09 Updated Makefile to reflect new Linux and Imperas situation. Updated setup to include Synopsys license file. 2022-03-03 11:28:22 -08:00
David Harris
545f569f78 Fixed fma files to stop breaking synthesis. Changed Makefiles to skip Imperas 2022-03-03 15:38:08 +00:00
David Harris
080fef6436 erge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-02 23:47:16 +00:00
David Harris
8fbdbba81a fma file fixes 2022-03-02 23:47:01 +00:00
bbracker
e28ca531e0 fix peripheral test and add it to regression 2022-03-02 23:44:39 +00:00
bbracker
be2f668867 but apparently QEMU doesn't show UXL in SSTATUS 2022-03-02 22:44:19 +00:00
bbracker
01e0f2f0d2 update SXL UXL bits in MSTATUS to match new QEMU trace 2022-03-02 22:15:57 +00:00
bbracker
c1290d493f add CSRs to waveview 2022-03-02 18:31:10 +00:00
bbracker
d7b8c9d877 add rv32a tests to regression 2022-03-02 17:54:55 +00:00
bbracker
6c422cd357 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-03-02 17:46:40 +00:00