Domenico Ottolia
a40b0c6392
Add privileged tests for mcause
2021-03-16 19:22:36 -04:00
Domenico Ottolia
4330e6614b
Add privileged tests folder
2021-03-16 16:11:20 -04:00
bbracker
7852d866ef
JALR testing
2021-03-04 10:37:30 -05:00
Thomas Fleming
5fd521d333
Create virtual memory ad-hoc test
...
Test program is currently failing on ovpsim. There is no indication that ovpsim
is properly implementing virtual memory translation when satp is set accordingly.
Need to confirm whether this is a problem with ovpsim, how ovpsim is being
called, or the test itself.
2021-03-03 17:06:37 -05:00
David Harris
3900abeb86
WALLY ALU tests
2021-02-15 10:16:31 -05:00
Domenico Ottolia
3ee975dd5a
Add privileged test cases
2021-02-14 17:01:46 -05:00
Shreya Sanghai
4e887f83a3
added branch tests
2021-02-12 22:40:08 -05:00
Tejus Rao
fb6a4bbbf0
added test cases for ADDW, SUBW, SLLW, SRLW, SRAW
2021-02-11 13:38:38 -05:00
ethan-falicov
863796b3c1
Merge conflict fixing
2021-02-10 09:45:47 -05:00
ethan-falicov
67662b888e
Adding I Type test cases from Lab 1
2021-02-10 09:39:43 -05:00
Elizabeth Hedenberg
805817cda4
merge conflict?
2021-02-07 02:34:49 -05:00
Jarred Allen
a3f2f4c7bc
Add test vector set for load instructions
2021-02-06 13:05:59 -05:00
bbracker
15c0b4af22
JAL testing
2021-02-05 08:08:42 -05:00
Thomas Fleming
8d7a515ae7
Complete STORE tests
2021-02-04 15:38:22 -05:00
Jarred Allen
f700efc2b3
Start on a test set for loads
2021-02-03 00:37:43 -05:00
David Harris
2f24249d17
testgen-ADD-SUB working and testbench simualtes with new vectors for rv32 and rv64
2021-01-20 01:04:28 -05:00
David Harris
9679345cae
testgen-ADD-SUB initial untested
2021-01-19 22:58:56 -05:00
David Harris
820312bc87
Initial testgen checkin
2021-01-19 13:09:56 -05:00