216 Commits

Author	SHA1	Message	Date
Ross Thompson	526f046fb0	Added if generate around bp logic only used with performance counters.	2023-02-23 14:39:31 -06:00
Ross Thompson	2d919fa9e3	Renamed PCPredX to BTAX.	2023-02-23 14:33:32 -06:00
Kip Macsai-Goren	67f83cda7f	Fixed lint errors on zero and pop count. All of regression passes	2023-02-22 20:25:51 -08:00
Kip Macsai-Goren	ba3bfdf68b	Manual attempt to merge with upstream changes	2023-02-22 19:42:30 -08:00
Kip Macsai-Goren	cc47bd8bea	Merge remote-tracking branch 'upstream/main' into main	2023-02-22 15:47:54 -08:00
Ross Thompson	c736d7c1f3	Fixed bug in basic gshare.	2023-02-22 12:54:46 -06:00
Ross Thompson	849856034b	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-22 09:11:57 -06:00
Ross Thompson	5dde3af22e	Oups. Turns out dc_shell does not like string parameters. ... Switched gshare to use an integer parameter to select between gshare and global.	2023-02-22 09:11:46 -06:00
Kip Macsai-Goren	d668c563f4	Merge remote-tracking branch 'upstream/main' into main	2023-02-21 14:48:41 -08:00
Kevin Kim	35bd4f7219	added individual zb tests in tests.vh and testbench ... - also minor alu/controller configurability changes	2023-02-21 11:52:05 -08:00
David Harris	f0566173e6	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-21 09:58:18 -08:00
David Harris	b59df0fca7	Fixed Issue #65 fmv sign selection. Sign needs to come from most significant bit of raw X source without doing NaN Box fixes first.	2023-02-21 09:57:57 -08:00
David Harris	a445e53e8d	Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.	2023-02-21 09:32:17 -08:00
Ross Thompson	7f0d64d0a6	Fixed typo in the global branch predictor.	2023-02-20 18:48:02 -06:00
Ross Thompson	2c2c1b5221	Cleanup branch predictor files.	2023-02-20 18:45:45 -06:00
Ross Thompson	7df3a84060	Renamed branch predictors and consolidated global and gshare predictors.	2023-02-20 18:42:37 -06:00
Ross Thompson	6eefa5b1e3	Fixed another bug in the btb.	2023-02-20 17:54:22 -06:00
Ross Thompson	d2b7047744	Fixed forwarding bug in the BTB.	2023-02-20 17:03:45 -06:00
Ross Thompson	fdd007a903	Found a bug where the d and i cache misses were not recorded in the performance counters.	2023-02-20 16:00:29 -06:00
Ross Thompson	545af7697f	Simiplified BTB.	2023-02-20 15:39:42 -06:00
David Harris	1028fd1053	Removed test code that broke LSU	2023-02-20 12:42:46 -08:00
David Harris	da61d11de1	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-20 11:28:15 -08:00
David Harris	36b2d530c4	Merge pull request #98 from ross144/main ... New gshare implementation	2023-02-20 11:27:47 -08:00
David Harris	801f4a68b7	Extraction script updates to match new reports names	2023-02-20 10:16:45 -08:00
David Harris	4cc8448b16	Removed unused and incomplete ROM macro instantations	2023-02-20 05:59:57 -08:00
David Harris	626715befd	Fixed IROM size parameters	2023-02-20 05:32:43 -08:00
David Harris	472c7da399	New expression for BTB_SIZE to avoid error during sky90 synthesis	2023-02-20 04:02:00 -08:00
Ross Thompson	4db249ca5d	Simplified BTB by removing the valid bit. the instruction class provides the equivalent information.	2023-02-19 23:53:20 -06:00
Ross Thompson	407d9e7b4a	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-19 22:54:27 -06:00
Ross Thompson	0f98cfe5b4	Simplified branch predictor.	2023-02-19 22:49:48 -06:00
David Harris	d07c6386b2	Added BTB_SIZE parameter independent of BPRED_SIIZE	2023-02-19 20:13:50 -08:00
David Harris	20ced0653c	Parameterized btb to depend on BPRED_SIZE	2023-02-19 19:59:07 -08:00
Kip Macsai-Goren	65a5b86dd8	Merge remote-tracking branch 'upstream/main' into main	2023-02-19 16:37:18 -08:00
David Harris	5287c54278	Adjusted DTIM to always be 512B independent of XLEN	2023-02-19 16:14:38 -08:00
David Harris	00d54cfe6c	PMP checker size check to avoid spurious warnings	2023-02-19 16:08:23 -08:00
David Harris	fa0406b554	Moved conditional instantiation outside pmpchecker	2023-02-19 15:31:00 -08:00
David Harris	8db49c83c4	Disabled W64M register for RV32	2023-02-19 07:03:31 -08:00
David Harris	527566c38a	Fixed RAM instantiations	2023-02-19 06:31:41 -08:00
Ross Thompson	89aa57e25e	Possibly much better branch predictor implemention. ... The complexity is significantly reduced.	2023-02-19 00:17:37 -06:00
Kevin Kim	0f876c3111	B DONE (for now) ... - datapath passes along comparator flag to alu - controllers and zbb handle min/max instructions	2023-02-18 22:12:55 -08:00
Ross Thompson	9f997eb5d0	Minor fix.	2023-02-18 23:55:46 -06:00
Kevin Kim	2319661b10	controlleres and zbb handle byte instructions	2023-02-18 21:06:55 -08:00
Kevin Kim	e7339902ae	alu and controllers handle andn, orn, xnor	2023-02-18 20:57:07 -08:00
Kevin Kim	59e9c7c747	added logic to handle sign/zero extend instructions	2023-02-18 20:32:40 -08:00
Kevin Kim	ad63699aac	fixed ctlzw bug in count unit	2023-02-18 20:12:30 -08:00
Kevin Kim	ecfcad20a0	zbb handles count instructions	2023-02-18 20:12:17 -08:00
Kevin Kim	543dc1e36a	fixed bmuctrl decode bug	2023-02-18 20:11:50 -08:00
Kevin Kim	446327215d	updated comments in bmuctrl	2023-02-18 19:57:10 -08:00
Kevin Kim	baff2c9362	rotate instructions now handled in ZBB unit	2023-02-18 19:56:54 -08:00
Kevin Kim	e4085764e7	removed redundant decode logic in bmuctrl	2023-02-18 19:50:36 -08:00
Kevin Kim	f18cd53dee	began ZBB integration into ieu	2023-02-18 19:44:14 -08:00
Kevin Kim	5f56f72bb1	bmuctrl handles roriw	2023-02-18 16:26:16 -08:00
Kip Macsai-Goren	9c3aa55349	merge upstream synth changes	2023-02-18 14:35:19 -08:00
David Harris	92d4acf118	Removed unused PredInstrClassE register from bpred	2023-02-18 05:59:25 -08:00
David Harris	1af99c7aee	Removed unused weq0M register fron fdivsqrtpostproc	2023-02-18 05:57:39 -08:00
David Harris	adc22235be	Fixed issue #57 of sign selection for improperly NaN-boxed number	2023-02-18 05:34:40 -08:00
David Harris	7923d32c3a	Fixed unpacking of illegal NaN box. Fixed issue #56 of sign injection NaN	2023-02-18 05:25:38 -08:00
Kevin Kim	2ccbde9d09	configured shifter in alu	2023-02-17 21:58:49 -08:00
Kevin Kim	f85c1058ff	shifter bug fix ... - roli not passing unless I keep the MSB (instead of inverting) of truncated offset	2023-02-17 21:58:26 -08:00
Kevin Kim	77fc40149f	controller supports some rotates	2023-02-17 21:57:34 -08:00
Kevin Kim	5e7ed8804f	bmuctrl supports some rotates	2023-02-17 21:57:19 -08:00
David Harris	63a6567ed3	Created PostBox signal to NaN-box malformed NaNs of excess length. Fixes Issue #55	2023-02-17 20:51:43 -08:00
Kevin Kim	9af0ffe3a9	added zero extend, pre-shift mux to ALU	2023-02-17 20:15:12 -08:00
Kevin Kim	cad0973b6b	more elegant ZBA logic in controller	2023-02-17 20:14:47 -08:00
Kevin Kim	88d7c3b1f2	bmuctrl handles .uw instructions	2023-02-17 20:14:13 -08:00
David Harris	154d7eb9ef	Fixed RAM bugs and refactored with read taking place after clock edge rather than before.	2023-02-17 19:14:38 -08:00
Kevin Kim	01f3cc2838	controller supports ZBA instructions	2023-02-17 16:44:16 -08:00
Kevin Kim	b09d942d60	removed Funct7 in Execute Stage	2023-02-17 16:12:09 -08:00
David Harris	daf2f822c2	Memory synthesis updates	2023-02-17 15:33:49 -08:00
David Harris	3f2f48ddc6	Continue fixing memory macros for synthesis	2023-02-17 15:15:37 -08:00
Ross Thompson	ae8b01b8d4	Renamed globalhistory predictor.	2023-02-17 16:08:34 -06:00
Ross Thompson	2661ec97d8	Fixed global history predictor.	2023-02-17 16:05:48 -06:00
Ross Thompson	a98a85f144	More updates.	2023-02-17 15:53:49 -06:00
Ross Thompson	1d9335c934	Updated global history predictor.	2023-02-17 15:53:15 -06:00
David Harris	aba29f6cc8	Synthesis with memories	2023-02-17 13:51:05 -08:00
Ross Thompson	e0a8974c7d	Fixed a branch predictor performance issue.	2023-02-17 15:37:03 -06:00
Kevin Kim	a1570a88c9	bmuctrl checks for illegal zbs-style instructions	2023-02-17 12:54:08 -08:00
Kevin Kim	370ff54875	bctrl bug fix ... - bctrl decodes shift immediate instructions properly	2023-02-17 11:16:29 -08:00
Kevin Kim	aba4eb80d4	alu bug fix ... - condmaskb piped in correctly instead of b	2023-02-17 11:02:07 -08:00
Kevin Kim	07eaf146c2	alu looks at BSelect, added BSelect one hot signal	2023-02-17 09:51:49 -08:00
Ross Thompson	c97fa02300	Merge branch 'main' of github.com:ross144/cvw	2023-02-17 10:58:16 -06:00
Ross Thompson	3398c5156b	Fixed bug with branch predictor.	2023-02-17 10:57:50 -06:00
Kevin Kim	323d14f9d9	added alu changes to previous commit	2023-02-17 08:22:13 -08:00
Kevin Kim	44c9612a5c	added BSelect Signal ... - BSelect [3:0] is a one hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction	2023-02-17 08:21:55 -08:00
Kevin Kim	ada6023a41	comments	2023-02-17 07:53:14 -08:00
Kevin Kim	ab542a5bc3	comments	2023-02-17 07:52:54 -08:00
Kevin Kim	290fcd1789	comment formatting	2023-02-17 07:51:28 -08:00
Kevin Kim	5b341ac3a7	alu handles ALU select instead of funct3	2023-02-17 07:51:10 -08:00
Kevin Kim	ff365de54a	added BMU controll	2023-02-17 07:50:59 -08:00
Kevin Kim	f0c81247e4	Added ALUSelect signal into datapath, ieu, controller	2023-02-17 07:50:45 -08:00
David Harris	0d2baed943	Reverted lab3 changes in dev branch	2023-02-16 18:10:05 -08:00
David Harris	26ea8b03c3	Merge branch 'lab3_2023' of https://github.com/openhwgroup/cvw into dev	2023-02-16 17:57:51 -08:00
David Harris	33eb5423cb	Update datapath.sv	2023-02-16 17:53:31 -08:00
David Harris	113b124721	Update controller.sv	2023-02-16 17:52:44 -08:00
David Harris	43afa34338	Update alu.sv	2023-02-16 17:52:25 -08:00
Ross Thompson	b62bacbac3	keep this commit off of cvw.	2023-02-16 11:05:24 -06:00
David Harris	5b370bdc0f	Added SSTC support for supervisor timer compare, but presently disable support. Reenable for rv32gc and rv64gc after tests pass.	2023-02-16 07:37:12 -08:00
Kevin Kim	921a32faf9	added comments to zbc units	2023-02-15 17:42:32 -08:00
Kevin Kim	50f0262498	zbc configurability and select mux	2023-02-15 17:39:37 -08:00
Kevin Kim	cd13913f07	controller forwards funct7 ... - started the bmu controll register	2023-02-15 17:38:12 -08:00