Katherine Parry
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8d101548f1
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FDIV and FSQRT passes when simulating in modelsim
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2021-07-18 23:00:04 -04:00 |
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bbracker
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64a81941ff
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change memread testvectors to not left-shift bytes and half-words
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2021-07-18 21:49:53 -04:00 |
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bbracker
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f4f3ef0307
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linux testbench progress
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2021-07-18 18:47:40 -04:00 |
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David Harris
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398e9583e9
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-07-18 17:36:29 -04:00 |
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David Harris
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f22b6e7397
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Added FLEN, NE, NF to config and started using these in FMA1
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2021-07-18 17:28:25 -04:00 |
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Katherine Parry
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3527620c0b
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fdivsqrt inegrated, but not completley working
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2021-07-18 14:03:37 -04:00 |
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David Harris
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e31d2ef9f5
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Renamed pagetablewalker to hptw
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2021-07-18 04:11:33 -04:00 |
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David Harris
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e962324d00
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LSUArb: Removed Demuxes on ReadDataW, DataMiisalignedM, HPTWStall
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2021-07-18 03:51:30 -04:00 |
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David Harris
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40c5d3ced7
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HPTW: Simpliifieid PRegEn
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2021-07-18 03:35:38 -04:00 |
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David Harris
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a5a7be3e03
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Removed EndWalk signal and simplified TLBMissReg
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2021-07-18 03:26:43 -04:00 |
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Ross Thompson
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a0017e39e2
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Fixed bug with rv32a/WALLY-LRSC test in imperas. Minor issue.
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2021-07-17 21:02:24 -05:00 |
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Ross Thompson
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d0ed6e250a
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Fixed LRSC in 64bit version. 32bit version is broken.
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2021-07-17 20:58:49 -05:00 |
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David Harris
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3be88117c5
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added lrsc.sv
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2021-07-17 21:15:08 -04:00 |
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David Harris
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c29a2ff8df
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Started atomics
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2021-07-17 21:11:41 -04:00 |
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David Harris
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3783b5dc00
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moved subwordread to lsu
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2021-07-17 20:37:20 -04:00 |
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David Harris
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84f579038c
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-07-17 20:01:23 -04:00 |
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David Harris
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d441d4270c
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LSU cleanup
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2021-07-17 20:01:03 -04:00 |
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David Harris
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f21582906f
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Pushing HPTWPAdrM flop into LSUArb
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2021-07-17 19:39:18 -04:00 |
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David Harris
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989bb7c01b
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Simplified VPN case statement
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2021-07-17 19:34:01 -04:00 |
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Ross Thompson
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379cf6c188
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2021-07-17 18:27:44 -05:00 |
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David Harris
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25450bd7c1
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Finished HPTW TranslationPAdr simlification
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2021-07-17 19:27:24 -04:00 |
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Ross Thompson
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053e9593af
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Before returning to the ready state the dcache must set SelAdr = 0 on the cycle before.
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2021-07-17 18:26:29 -05:00 |
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David Harris
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217bf37668
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Further TranslationVAdr simplification
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2021-07-17 19:24:37 -04:00 |
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David Harris
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d8397b5e8b
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Continued Translation Address Cleanup of TranslationPAdrMux
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2021-07-17 19:16:56 -04:00 |
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David Harris
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6f73844427
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Continued Translation Address Cleanup
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2021-07-17 19:09:13 -04:00 |
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David Harris
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2e2e948023
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Refining address interface between HPTW and LSU
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2021-07-17 19:02:18 -04:00 |
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David Harris
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12cfe91362
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Fixed bad register in I-FSD-01 Imperas test.
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2021-07-17 17:08:07 -04:00 |
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David Harris
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e3bf8db80b
|
trap.sv comment cleanup
|
2021-07-17 16:01:07 -04:00 |
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David Harris
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b2c2194478
|
trap.sv cleanup
|
2021-07-17 15:57:10 -04:00 |
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David Harris
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777e983c19
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Finished removing PageTableEntry redundant signals from hptw
|
2021-07-17 15:50:52 -04:00 |
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David Harris
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348e69c096
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hptw: Removed NonBusTrapM from LSU
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2021-07-17 15:24:26 -04:00 |
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David Harris
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49ec45d04d
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hptw: Removed NonBusTrapM from LSU
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2021-07-17 15:22:24 -04:00 |
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David Harris
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162afcc994
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Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-07-17 15:11:43 -04:00 |
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David Harris
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e55546da34
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hptw: Propagating PageTableEntryF removal through IFU
|
2021-07-17 15:04:39 -04:00 |
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David Harris
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bf56000f4e
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hptw: Propagating PageTableEntryF removal through LSU
|
2021-07-17 15:01:01 -04:00 |
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bbracker
|
56f246463f
|
separated buildroot debugging from buildroot logging
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2021-07-17 14:52:34 -04:00 |
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David Harris
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d6b8a5e595
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hptw: Unified PageTableEntryM and PageTableEntryF outputs of pagetablewalker into PTE
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2021-07-17 14:48:44 -04:00 |
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bbracker
|
6feb95c779
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swapped out linux testbench signal names
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2021-07-17 14:48:12 -04:00 |
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bbracker
|
d85da77069
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
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2021-07-17 14:46:38 -04:00 |
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bbracker
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ac908bc2e4
|
swapped out linux testbench signal names
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2021-07-17 14:46:18 -04:00 |
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David Harris
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ef03ec275c
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hptw: Added ValidLeaf and ValidNonLeaf for readability, renamed _WDV to _READ states
|
2021-07-17 14:36:27 -04:00 |
|
David Harris
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d19679f213
|
hptw: Eliminated A and D bit faults while walking page table, per spec
|
2021-07-17 14:29:20 -04:00 |
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David Harris
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ad44835e6e
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hptw: Simplified TranslationVAdr calculation based just on DTLBWalk
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2021-07-17 14:16:33 -04:00 |
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David Harris
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af02437c3a
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hptw: renamed DTLBMissQ to DTLBWalk
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2021-07-17 14:13:00 -04:00 |
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David Harris
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8e966b37f2
|
hptw: renamed ADRE to ADR
|
2021-07-17 14:02:59 -04:00 |
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David Harris
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95d49e4e9b
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hptw: replaced PreviousWalkerState with a PageType FSM
|
2021-07-17 13:54:58 -04:00 |
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David Harris
|
964f0d9f53
|
hptw: removed ITLBMissFQ
|
2021-07-17 13:44:08 -04:00 |
|
David Harris
|
9741b01465
|
hptw: minor cleanup
|
2021-07-17 13:40:12 -04:00 |
|
David Harris
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ee784c19a5
|
hptw: Simplifed out AnyTLBMiss
|
2021-07-17 12:07:51 -04:00 |
|
David Harris
|
40989c4e3d
|
hptw: Renamed Memstore to MemWrite
|
2021-07-17 12:01:43 -04:00 |
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