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hptw: Unified PageTableEntryM and PageTableEntryF outputs of pagetablewalker into PTE

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This commit is contained in:
David Harris 2021-07-17 14:48:44 -04:00
parent ef03ec275c
commit d6b8a5e595
2 changed files with 9 additions and 6 deletions
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9
wally-pipelined/src/lsu/lsu.sv
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@ -118,7 +118,7 @@ module lsu
logic [`PA_BITS-1:0] MemPAdrM; // from mmu to dcache
logic DTLBMissM;
logic [`XLEN-1:0] PageTableEntryM;
logic [`XLEN-1:0] PTE, PageTableEntryM;
logic DTLBWriteM;
logic [`XLEN-1:0] HPTWReadPTE;
logic HPTWStall;
@ -157,8 +157,8 @@ module lsu
.ITLBMissF(ITLBMissF),
.DTLBMissM(DTLBMissM),
.MemRWM(MemRWM),
.PageTableEntryF(PageTableEntryF),
.PageTableEntryM(PageTableEntryM),
.PTE(PTE),
// .PageTableEntryM(PageTableEntryM),
.PageType,
.ITLBWriteF(ITLBWriteF),
.DTLBWriteM(DTLBWriteM),
@ -171,6 +171,9 @@ module lsu
.WalkerInstrPageFaultF(WalkerInstrPageFaultF),
.WalkerLoadPageFaultM(WalkerLoadPageFaultM),
.WalkerStorePageFaultM(WalkerStorePageFaultM));
assign PageTableEntryM = PTE;
assign PageTableEntryF = PTE;
assign WalkerPageFaultM = WalkerStorePageFaultM | WalkerLoadPageFaultM;

6
wally-pipelined/src/mmu/pagetablewalker.sv
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@ -41,7 +41,7 @@ module pagetablewalker
input logic [1:0] MemRWM,
// Outputs to the TLBs (PTEs to write)
output logic [`XLEN-1:0] PageTableEntryF, PageTableEntryM,
output logic [`XLEN-1:0] PTE, //PageTableEntryM,
output logic [1:0] PageType,
output logic ITLBWriteF, DTLBWriteM,
output logic SelPTW,
@ -120,8 +120,8 @@ module pagetablewalker
// Assign specific outputs to general outputs
// *** try to eliminate this duplication, but attempts caused MMU to hang
assign PageTableEntryF = CurrentPTE;
assign PageTableEntryM = CurrentPTE;
assign PTE = CurrentPTE;
// assign PageTableEntryM = CurrentPTE;
assign SelPTW = (WalkerState != IDLE) & (WalkerState != FAULT);
assign DTLBWriteM = (WalkerState == LEAF) & DTLBWalk;