718 Commits

Author	SHA1	Message	Date
Jordan Carlin	8a58f9556e	Merge branch 'main' of https://github.com/openhwgroup/cvw into arch-test-update	2024-09-29 17:16:05 -07:00
Jordan Carlin	68b854fc20	Finish updating riscof and sim Makefiles to allow targets to run in parallel	2024-09-29 14:05:28 -07:00
Jordan Carlin	8cb0c08e68	more wally-riscv-arch-test cleanup	2024-09-29 10:28:31 -07:00
Jordan Carlin	766b0a83d7	Remove wally32d tests since they are covered elsewhere now	2024-09-29 10:27:20 -07:00
Jordan Carlin	330eda243c	Remove wally32i and wally64i tests since they are covered elsewhere now	2024-09-29 10:26:08 -07:00
Jordan Carlin	4c5f397afd	Remove old testgen scripts	2024-09-29 10:22:12 -07:00
Jordan Carlin	4cacc6b80c	More testfloat makefile cleanup	2024-09-29 01:05:38 -07:00
Jordan Carlin	478ed242ad	More testfloat gen updates to switch to just riscv vectors	2024-09-29 00:32:18 -07:00
Jordan Carlin	495d1c7145	Only generate RISCV version of softfloat	2024-09-28 21:43:41 -07:00
Jordan Carlin	14b630a403	More testfloat fixups	2024-09-28 20:56:58 -07:00
Jordan Carlin	0c2ce32c56	Update fp Makefile to generate softfloat	2024-09-28 20:23:27 -07:00
Jordan Carlin	bf0c7fba95	Update fp Makefile to generate softfloat	2024-09-28 20:20:06 -07:00
Jordan Carlin	0bfd0dc32d	Add license header to new floating point Makefiles	2024-09-20 16:43:36 -07:00
Jordan Carlin	d7edeef79a	Update top level floating point test Makefile to build all vectors and testfloat binaries	2024-09-20 16:28:05 -07:00
Jordan Carlin	766678d076	Add clean target to vector makefile	2024-09-20 16:22:25 -07:00
Jordan Carlin	aa1a86c70e	More testfloat Makefile refactoring and fix using the wrong softfloat	2024-09-19 15:34:16 -07:00
Jordan Carlin	90cf61401e	Fix testfloat Makefile	2024-09-19 13:39:24 -07:00
Jordan Carlin	cc92cb125f	Makefile for all fp testvectors	2024-09-19 13:38:35 -07:00
Jordan Carlin	7071d15341	Initial attempt at two separate version of testfloat for riscv and ieee	2024-09-18 17:37:29 -07:00
Jordan Carlin	c13c57b5a6	Refactor floating point testvector Makefile to split up RISCV and IEEE due to Make issues	2024-09-18 17:37:02 -07:00
Jordan Carlin	cb944e0f92	Remove old testfloat and replace references	2024-09-15 01:03:03 -07:00
Jordan Carlin	7e41961dd1	Remove old softfloat and replace references	2024-09-15 00:34:18 -07:00
Jordan Carlin	f7b93ac700	More simplification of fp testvector makefile	2024-09-14 20:59:00 -07:00
Jordan Carlin	d2ef362761	Fix testfloat cvtint generation	2024-09-14 20:16:28 -07:00
Jordan Carlin	ec8302d597	Split up cvtint and cvtfp tests	2024-09-14 20:11:09 -07:00
David Harris	6e0b0487dd	Recreated coverage changes	2024-09-05 16:32:45 -07:00
David Harris	712274af3d	Removed covergen makefile	2024-09-05 16:29:07 -07:00
David Harris	941d662b59	Removed covergen	2024-09-05 16:28:48 -07:00
naichewa	58be9e0556	Merge branch 'spi_debug'	2024-09-03 15:00:59 -07:00
naichewa	3b7661dfd5	SckDiv Zero bug fixes	2024-09-03 14:58:46 -07:00
David Harris	ff9f0fa140	Updated riscv-isac dependencies for security	2024-09-03 03:46:44 -07:00
Jacob Pease	3b91977227	Added start.s to spitest directory.	2024-08-28 04:10:24 -05:00
Jacob Pease	44ece7cb96	Added CVW header to spitest files.	2024-08-27 14:28:49 -05:00
Jacob Pease	b7a74307c5	Committing the custom test spitest.	2024-08-27 14:19:56 -05:00
Rose Thompson	6be30369f1	Merge branch 'main' of github.com:openhwgroup/cvw	2024-08-21 11:02:23 -07:00
Rose Thompson	faffecf891	Merge branch 'main' of github.com:openhwgroup/cvw	2024-08-21 11:02:17 -07:00
Rose Thompson	01b623b8c4	Merge branch 'main' of github.com:openhwgroup/cvw	2024-08-21 11:02:08 -07:00
Rose Thompson	f603d21826	Updated my name in multiple locations.	2024-08-21 10:50:39 -07:00
Huda-10xe	ca21b865b3	Adding regression commands to Makefile	2024-08-21 15:45:23 +05:00
Jacob Pease	baad4e0fd2	With Naiche's help, we fixed the SPI controllers clock polarity and phase settings. Added conditions to the SPI regression tests.	2024-08-20 16:24:37 -05:00
David Harris	f4871c14f7	Merge pull request #918 from jordancarlin/fp_tests_make ... Testfloat vector generation refactoring + root Makefile cleanup	2024-08-17 04:32:45 -07:00
David Harris	ef7028154c	Merge pull request #873 from Shreesh-Kulkarni/main ... Modified riscv-isacov and riscv-ctg files to support some missing quad instructions.	2024-08-16 11:10:35 -07:00
Jordan Carlin	d6110c3d0b	Set riscof jobs based on number of cores	2024-08-15 19:02:48 -07:00
Jordan Carlin	3b85f92695	Testfloat vector generation refactoring	2024-08-15 18:53:26 -07:00
Jordan Carlin	6d77398c95	Update linker scripts to avoid hardcoded /opt/riscv	2024-08-09 20:15:28 -07:00
Jordan Carlin	357175f1c8	Merge branch 'main' of https://github.com/openhwgroup/cvw into installation	2024-08-07 20:22:55 -07:00
Huda-10xe	2405b6c1e2	Adding RVVI Functional Coverage Support	2024-08-07 14:31:16 +05:00
Jordan Carlin	2f1a101735	Merge branch 'main' of https://github.com/openhwgroup/cvw into installation	2024-07-25 21:21:57 -07:00
David Harris	b7fb786749	Increased covergen.py functional coverage to 87.6%	2024-07-23 04:38:13 -07:00
David Harris	a9fd6e6cfb	Added more RV64I coverage generation	2024-07-22 08:52:19 -07:00