Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity
5,971 Commits 5 Branches 2 Tags 53 MiB
89954df49b
Commit Graph

5971 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
David Harris
4c6f539449 Removed flq from LLEN=64 2023-03-19 10:25:04 -07:00
David Harris
adbdc44f7b Improved coverage reporting 2023-03-19 10:24:35 -07:00
David Harris
ff22520d9e Added comments about PMP checker fixes when test cases will be ready to initialize PMP before entering user mode 2023-03-19 05:46:34 -07:00
David Harris
4cde207958 Fix Issue #120 about SIE/SIP being 0 unless MIDELEG bits are set. However, this fix breaks the wally32/64priv tests in regression. 2023-03-18 10:10:58 -07:00
David Harris
f53b2f6e1f Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-18 09:24:37 -07:00
David Harris
6922298f21 Replaced FenceM with InvalidateICacheM for event counting of fence.i 2023-03-18 09:24:31 -07:00
Mike Thompson
255d5efb51 Merge pull request #140 from ross144/main 
Added notes on linux image generation
 2023-03-17 09:16:14 -04:00
Ross Thompson
318a9ec0f3 Merge branch 'main' of github.com:ross144/cvw into main 2023-03-17 00:48:04 -05:00
Ross Thompson
2150091e54 Added notes on how to run QEMU to generate linux image. 2023-03-17 00:47:52 -05:00
Mike Thompson
59985ff8a2 Merge pull request #139 from ross144/main 
Updates for book
 2023-03-14 15:44:59 -04:00
Ross Thompson
3d37d2769a Book updates. 2023-03-14 13:09:50 -05:00
Ross Thompson
36062e2758 Merge pull request #138 from eroom1966/main 
Fix MISA RO and UART addresses
 2023-03-13 23:32:56 -05:00
Ross Thompson
3cae6ca90f Updated NextAdr to NextSet. 2023-03-13 14:54:13 -05:00
Ross Thompson
c190444fa2 Updated CAdr to CacheSet. 2023-03-13 14:53:00 -05:00
Ross Thompson
a8d6c1cc2f More accurate c model gshare results. 2023-03-13 13:54:04 -05:00
Ross Thompson
2df36f23a7 On our way to finish the C reference data collection. 2023-03-13 13:32:09 -05:00
Ross Thompson
64502fa34c Merge branch 'main' of github.com:ross144/cvw into main 2023-03-13 13:30:49 -05:00
Ross Thompson
d2968376a9 Added reference data. 2023-03-13 13:30:43 -05:00
Ross Thompson
673044f923 Modified branch logger to indicate when the warmup period is done. 
The branch-predictor-simulator also changed to support this.
 2023-03-13 13:26:27 -05:00
eroom1966
9ddfe52c9f Fix MISA RO and UART addresses 
It appears on inspection that the MISA register is read only in Wally
In which case this has now also been set in the ImperasDV representation
Also the Addresss for the UART R/W privileges are corrected
 2023-03-13 11:07:19 +00:00
Ross Thompson
be05fd5297 Created script to batch processes all the embench branch outcomes into C model branch prediction rate. 2023-03-12 23:15:44 -05:00
Ross Thompson
d7066f72e9 Renamed script to parse branch.log 2023-03-12 22:40:59 -05:00
Ross Thompson
dea9dd962e Added script to separate branch.log into separate logs for each benchmark. 2023-03-12 17:58:36 -05:00
Ross Thompson
187752a339 Modified the branch log to include markers for the start and end of tests with exclusion of warmup period. 2023-03-12 17:15:56 -05:00
Ross Thompson
ada099c58b Changes BTA to BPBTA. 2023-03-12 14:36:46 -05:00
Ross Thompson
a5523400ae Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10. 2023-03-12 13:21:22 -05:00
Kevin Kim
0d0d3b981e more checks in bitmanip decode 2023-03-10 17:17:24 -08:00
Kevin Kim
9b4f3219db formatting 2023-03-10 14:32:01 -08:00
Kevin Kim
c380b0816d removed redundant convinvb signal 2023-03-10 14:18:24 -08:00
Kevin Kim
dcaf9de228 removed redundant condinvb mux 2023-03-10 14:17:38 -08:00
Ross Thompson
e4f35a768d Merge pull request #137 from davidharrishmc/dev 
Fixes to wally-batch for coverage
 2023-03-10 15:36:24 -06:00
David Harris
1d2c8e1da3 Fixes to wally-batch for coverage 2023-03-10 13:33:32 -08:00
Ross Thompson
9250c7b2de Merge pull request #136 from davidharrishmc/dev 
Bug fix in wally-regression
 2023-03-10 15:11:25 -06:00
David Harris
005ca9650b Fixed crash with wrong number of arguments for coverage in regression-wally 2023-03-10 13:10:28 -08:00
David Harris
f411803bc4 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-10 12:47:30 -08:00
David Harris
ee1b1fbd17 Removed unneeded echo from setup 2023-03-10 12:08:24 -08:00
David Harris
b202fa0448 Merge pull request #135 from eroom1966/main 
Enhancements to support the PMA ranges
 2023-03-10 06:13:33 -08:00
eroom1966
0233130d9c Enhancements to support the PMA ranges 2023-03-10 14:09:22 +00:00
David Harris
b19aeab5c6 Merge pull request #134 from ross144/main 
Updated testbench to report performance coutners for coremark.
 2023-03-09 16:09:03 -08:00
David Harris
e3751e3a26 Modified regression and wally-batch.do to support -coverage 2023-03-09 15:59:57 -08:00
David Harris
d139ee77c3 Modified setup to add Imperas/scripts/cvw to path 2023-03-09 15:59:28 -08:00
David Harris
33fa7e4706 Simplified SLT and SLTU code in ALU 2023-03-09 15:14:52 -08:00
Kevin Kim
2111e06195 Merge branch 'openhwgroup:main' into bit-manip 2023-03-09 12:45:41 -08:00
Kevin Kim
f29e8932a2 more comprehensive illegal b instr. check 2023-03-09 12:44:51 -08:00
Kevin Kim
f335d08bbf fixed bmu bug 
- accidentally deleted count instruction decode
 2023-03-09 12:35:42 -08:00
Ross Thompson
68b437ce92 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-09 13:29:38 -06:00
Kevin Kim
260dcc8b96 Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip 2023-03-08 16:22:47 -08:00
Kevin Kim
7002221dec cleaner bmu decode logic 2023-03-08 16:22:43 -08:00
Ross Thompson
4db17cde2f Updated testbench to record coremark performance counters. 
Added comment about mtval probably not being correct for compressed instructions.
 2023-03-08 17:11:27 -06:00
David Harris
3bd599d440 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-03-08 10:37:28 -08:00