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155 Commits

Author SHA1 Message Date
Ross Thompson
517cae796c Fixed more constraint issues in fpga. 
Added back in the ILA.
Design does not work yet.  Stil having issues with order of automatic
clock and I/O constraint ordering.
Added back in the preload for the boottim.
 2021-12-05 15:14:18 -06:00
Ross Thompson
cb744280c3 Fixed a bunch of fpga issues. 2021-12-03 17:47:54 -06:00
Ross Thompson
5d4051d1c2 Constraints for fpga are still wrong. 2021-12-02 14:23:21 -06:00
Ross Thompson
2a7467c76d Separated timing constraints from ILA. 2021-12-01 18:15:04 -06:00
Ross Thompson
6a228ade04 Got fpga synthesis running from scripts. 2021-12-01 16:59:04 -06:00