mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-03 10:15:19 +00:00
517cae796c
Added back in the ILA. Design does not work yet. Stil having issues with order of automatic clock and I/O constraint ordering. Added back in the preload for the boottim. |
||
---|---|---|
.. | ||
constraints.xdc | ||
debug.xdc |