David Harris
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cb1a7d54a4
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-05-03 08:53:35 -07:00 |
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David Harris
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4fbf78e049
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clean up sram1p1rw; still doesn't work on Modelsim 2022.1
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2022-05-03 08:31:54 -07:00 |
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David Harris
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9c4de0e9c1
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FPU generates illegal instruction if MSTATUS.FS = 00
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2022-05-03 11:56:31 +00:00 |
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David Harris
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dee32f70bf
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Switched to behavioral comparator for best PPA
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2022-05-03 11:00:39 +00:00 |
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David Harris
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bc123b5564
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Comparator experiments
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2022-05-03 10:54:30 +00:00 |
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David Harris
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7e3f75a35d
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Formatting cache.sv
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2022-05-03 10:53:20 +00:00 |
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David Harris
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bc132c3e20
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sram1p1rw extra bits are complaining on Tera and VLSI; roll back to two always blocks to fix on Tera
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2022-05-03 03:50:41 -07:00 |
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David Harris
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3f2ec0499f
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Rewriting sram1p1rw to combine CacheData into a single always_ff. Extra bits are still giving warning on VLSI that don't make sense.
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2022-05-03 03:45:41 -07:00 |
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David Harris
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7268ff1fd4
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Changed loop variable in CLINT because of error only seen on VLSI
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2022-05-03 10:10:28 +00:00 |
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Kip Macsai-Goren
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208827502e
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general test cleanup of comments and old files
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2022-04-29 19:55:29 +00:00 |
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Kip Macsai-Goren
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7148429f4a
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re-renamed status-mie-s to status-sie
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2022-04-29 19:55:13 +00:00 |
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Kip Macsai-Goren
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e557e420b6
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added missing SIE test
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2022-04-29 19:54:29 +00:00 |
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Kip Macsai-Goren
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f50aa61994
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renamed registers in test library to RISC-V ABI name rater than x2, etc..
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2022-04-29 18:52:42 +00:00 |
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Kip Macsai-Goren
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5df381e26f
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renamed PIE-stack tests to status-mie for clarity
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2022-04-29 18:30:39 +00:00 |
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Kip Macsai-Goren
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c3ffcd0e95
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removed old unused tests from wally arch tests
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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562296c677
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added missing output for sret
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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3d1e1202f3
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set WFI timeout to after 16 bits of counting for all configs
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2022-04-28 18:14:08 +00:00 |
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Kip Macsai-Goren
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0e5cc40360
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added 32 bit versions of new tests. all but timeout wait pass regression
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2022-04-28 18:14:07 +00:00 |
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Skylar Litz
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970f6c4222
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-04-27 10:50:19 -07:00 |
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Skylar Litz
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594db170de
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fix AttemptedInstructionCount from ground zero
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2022-04-27 10:45:40 -07:00 |
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David Harris
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52e260c146
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Ignore intermediate files in synthesis sweeps
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2022-04-27 13:12:04 +00:00 |
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David Harris
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6e8b27de17
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Added torture.tv test vectors
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2022-04-27 13:08:36 +00:00 |
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David Harris
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ffd4713fd1
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Checked in torture.tv
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2022-04-27 13:06:24 +00:00 |
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David Harris
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9042844b38
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Cleaned up canonical NaNs and removed denorm outputs in baby_torture.tv
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2022-04-26 19:41:30 +00:00 |
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Kip Macsai-Goren
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89cce88d33
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fixed incorrect configs in regression
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2022-04-25 19:28:47 +00:00 |
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Kip Macsai-Goren
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c4eb59c67c
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added missing output on final test terminating ecall
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2022-04-25 19:18:38 +00:00 |
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Kip Macsai-Goren
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0f4ca62157
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added working tests to test list, updated regression for new configs
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2022-04-25 19:18:15 +00:00 |
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Kip Macsai-Goren
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8ad920fcb3
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fixed initial value, timing on fs bits changing after floating point instruction
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2022-04-25 19:17:29 +00:00 |
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Kip Macsai-Goren
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7e6fefb2d9
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split status.fp tests into fp enabled/disabled
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2022-04-25 19:16:15 +00:00 |
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Kip Macsai-Goren
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da29193f9b
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removed atomic, floating point from privileged tests configs
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2022-04-25 19:13:15 +00:00 |
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Kip Macsai-Goren
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7ff85258f0
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added new tests to tests.vh, comented out until they pass regression
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2022-04-25 18:22:44 +00:00 |
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Kip Macsai-Goren
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63f3e16789
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added WFI and mstatus fp, tw bit tests
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2022-04-25 18:21:56 +00:00 |
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Kip Macsai-Goren
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7ca56fc033
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added floating point instructions to privileged tests
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2022-04-25 17:47:10 +00:00 |
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Kip Macsai-Goren
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7fe33b2147
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Lowered WFI timeout wait time for privileged configs
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2022-04-25 17:47:10 +00:00 |
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Kip Macsai-Goren
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5cf75debea
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comment cleanup
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2022-04-25 17:47:10 +00:00 |
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Shreya Sanghai
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bade8d3b07
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automate synth
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2022-04-25 16:03:32 +00:00 |
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bbracker
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b0fab61d34
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
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2022-04-25 08:01:39 -07:00 |
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David Harris
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cf1fde62fb
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Restored MPRV behavior per spec
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2022-04-25 14:52:18 +00:00 |
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David Harris
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0ede295e88
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Added dummy mstatus byte endianness fields tied to 0, mstatush register, removed UIE and UPIE depricated fields
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2022-04-25 14:49:00 +00:00 |
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bbracker
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871f63374e
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upgrade Buildroot Makefile to also copy over vmlinux
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2022-04-25 07:36:59 -07:00 |
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David Harris
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851d5e8c5e
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Added MTINST hardwired to 0, and added timeout of U-mode WFI
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2022-04-24 20:00:02 +00:00 |
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David Harris
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16ad1e0cab
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Fixed InstrMisalignedFaultM mtval
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2022-04-24 17:31:30 +00:00 |
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David Harris
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f1ddbb169c
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Improved priority order and mtval of traps to match spec
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2022-04-24 17:24:45 +00:00 |
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David Harris
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03f84bf11c
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Extended sim time to fully boot Linux. Added comments to hazard unit
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2022-04-24 13:51:00 +00:00 |
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Kip Macsai-Goren
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b277d3cf19
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Removed test cases irrelevant to this implementation, added explanatory comments.
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2022-04-22 23:06:52 +00:00 |
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Kip Macsai-Goren
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3e62a8f974
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Added testing for every bit field in MIE, rather than just one
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2022-04-22 23:05:54 +00:00 |
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Kip Macsai-Goren
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2cc6d3ddb4
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fixed timeouts on GPIO test by enabling pins as inputs as well as outputs.
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2022-04-22 22:46:11 +00:00 |
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Kip Macsai-Goren
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7bc6943527
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Changed mtval for instruction misaligned fault to get address from ieuAdrM (Jal/branch target address)
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2022-04-22 22:46:11 +00:00 |
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bbracker
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27920d3504
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less hardcoded paths in Makefile
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2022-04-21 20:42:02 -07:00 |
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bbracker
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5e76c83309
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deprecate unused LINUX_FIX_READ macro
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2022-04-21 19:14:47 -07:00 |
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