David Harris
7c71c21810
Merge pull request #201 from ross144/main
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Improved d/i cache loggers
2023-04-05 06:40:14 -07:00
Ross Thompson
02909b3c57
Fixed the d cache logger.
2023-04-04 14:19:19 -05:00
Ross Thompson
87e88a798f
Improved d/i cache logger.
2023-04-04 13:38:32 -05:00
eroom1966
adafc8037d
add support for Sstc
2023-04-04 17:20:00 +01:00
David Harris
4e2d80476e
Merge branch 'main' of https://github.com/openhwgroup/cvw into dev
2023-04-03 06:13:16 -07:00
James Stine
e513c315c9
Update one bug in testfloat - still have to fix fpdiv but others should now all work
2023-04-02 18:16:23 -05:00
David Harris
c1ec1cb09c
Added SSTC support to imperas.ic and wallyTracer. Fixes many of the privileged tests
2023-03-31 10:54:03 -07:00
Sydney Riley
4bd3121364
Manual merge in the coverage64gc
2023-03-29 15:25:27 -07:00
Sydney Riley
b0237eaa8b
Starting IFU tests including c.fld compressed instruction
2023-03-29 15:15:47 -07:00
David Harris
115c042015
Turned off hpm counters
2023-03-28 21:28:56 -07:00
David Harris
3dc1c6673d
Started adding fpu fctrl tests
2023-03-28 21:13:25 -07:00
Ross Thompson
d0f8db7939
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-28 16:31:50 -05:00
Ross Thompson
84860a062d
Modified the testbench to not use the loggers for unsupported configurations.
2023-03-28 16:27:54 -05:00
Ross Thompson
c65c9e52d4
Disable loggers by default.
2023-03-28 16:20:45 -05:00
Ross Thompson
650a1a8d7e
Now reports if there is a hit or miss.
2023-03-28 16:20:14 -05:00
Ross Thompson
ef26600689
Restored performance counter reports.
2023-03-28 16:15:05 -05:00
Ross Thompson
a5601ea264
Now have logging of i/d cache addresses, but the performance counter reports are x's.
2023-03-28 16:09:54 -05:00
Ross Thompson
e49cf8a028
Merge pull request #169 from davidharrishmc/dev
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PMP Fix to issue 132
2023-03-28 11:49:00 -05:00
David Harris
2c8fcc24e0
Fixed bitrot in testfloat tests
2023-03-28 09:35:19 -07:00
David Harris
2427e43ffd
Moved rv32 peripheral tests using TEST-LIB to wally32priv because rv32imc doesn't support PMP
2023-03-28 09:08:48 -07:00
David Harris
2e238c15aa
CSRS privileged coverage test
2023-03-28 04:37:56 -07:00
Ross Thompson
514738ad96
Now reports i cache and d cache memory accesses.
2023-03-27 23:44:50 -05:00
Ross Thompson
059c73a4d2
First stab at the i cache logger.
2023-03-27 18:36:51 -05:00
Ross Thompson
67ddce4a6b
Added buildroot instructions back to readme. moved these instructions to the docs directory.
2023-03-27 14:45:55 -05:00
Ross Thompson
d9691c1542
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-27 10:22:48 -05:00
eroom1966
1a10e48ecf
update to allow running of ImperasDV with linux boot
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optimize performance of the tracer
2023-03-27 09:46:16 +01:00
Lee Moore
4bb7dadc00
Merge branch 'openhwgroup:main' into add-linux
2023-03-27 09:44:13 +01:00
Ross Thompson
0afba56927
Updated GPIO signal names to reflect book.
2023-03-24 18:55:43 -05:00
Kip Macsai-Goren
74e0ece891
added working tests back into regression
2023-03-24 11:22:39 -07:00
David Harris
f1e87c5e69
Start of EBU coverage tests
2023-03-24 08:12:02 -07:00
David Harris
4e1bf6fbe0
Improved IEU and bitmanip test coverage
2023-03-23 14:24:41 -07:00
David Harris
121d1cea62
Added csrwrites.S test case for privileged tests
2023-03-23 10:55:32 -07:00
David Harris
ba4e0d2721
Merged bit manip
2023-03-23 06:55:29 -07:00
Kip Macsai-Goren
3a581c95a5
restored arch 64 bit manip tests
2023-03-22 15:45:54 -07:00
Kip Macsai-Goren
da2037f893
restored Imperas test names
2023-03-22 14:11:42 -07:00
David Harris
3b3aa942c7
Added coverage tests to regression coverage
2023-03-22 13:00:10 -07:00
Kevin Kim
1eb96e2221
Merge branch 'openhwgroup:main' into bit-manip
2023-03-22 10:33:15 -07:00
eroom1966
259fbc8d77
support linux
2023-03-22 17:10:32 +00:00
David Harris
f6bc499f34
Testbench improvements for coverage reporting and running Imperas suite to raise test coverage
2023-03-22 04:34:49 -07:00
Kevin Kim
3f46dff23e
Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip
2023-03-21 11:20:05 -07:00
David Harris
fecb282ff7
Commented out failing tests related to sip and sie
2023-03-21 05:51:43 -07:00
Kevin Kim
82d52f892b
Merge branch 'main' of https://github.com/openhwgroup/cvw into bit-manip
2023-03-20 13:06:10 -07:00
Mike Thompson
59985ff8a2
Merge pull request #139 from ross144/main
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Updates for book
2023-03-14 15:44:59 -04:00
Ross Thompson
673044f923
Modified branch logger to indicate when the warmup period is done.
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The branch-predictor-simulator also changed to support this.
2023-03-13 13:26:27 -05:00
eroom1966
9ddfe52c9f
Fix MISA RO and UART addresses
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It appears on inspection that the MISA register is read only in Wally
In which case this has now also been set in the ImperasDV representation
Also the Addresss for the UART R/W privileges are corrected
2023-03-13 11:07:19 +00:00
Ross Thompson
dea9dd962e
Added script to separate branch.log into separate logs for each benchmark.
2023-03-12 17:58:36 -05:00
Ross Thompson
187752a339
Modified the branch log to include markers for the start and end of tests with exclusion of warmup period.
2023-03-12 17:15:56 -05:00
eroom1966
0233130d9c
Enhancements to support the PMA ranges
2023-03-10 14:09:22 +00:00
Kevin Kim
2111e06195
Merge branch 'openhwgroup:main' into bit-manip
2023-03-09 12:45:41 -08:00
Ross Thompson
68b437ce92
Merge branch 'main' of https://github.com/openhwgroup/cvw
2023-03-09 13:29:38 -06:00
