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CSRS privileged coverage test

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This commit is contained in:
David Harris 2023-03-28 04:37:56 -07:00
parent 9b7e5cec1f
commit 2e238c15aa
3 changed files with 41 additions and 2 deletions
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2
src/privileged/csrs.sv
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@ -131,7 +131,7 @@ module csrs #(parameter
SATP: if (`VIRTMEM_SUPPORTED & (PrivilegeModeW == `M_MODE | ~STATUS_TVM)) CSRSReadValM = SATP_REGW;
else begin
CSRSReadValM = 0;
if (PrivilegeModeW == `S_MODE & STATUS_TVM) IllegalCSRSAccessM = 1;
IllegalCSRSAccessM = 1;
end
SCOUNTEREN:CSRSReadValM = {{(`XLEN-32){1'b0}}, SCOUNTEREN_REGW};
STIMECMP: if (`SSTC_SUPPORTED & (PrivilegeModeW == `M_MODE | MCOUNTEREN_TM)) CSRSReadValM = STIMECMP_REGW[`XLEN-1:0];

3
testbench/tests.vh
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@ -46,7 +46,8 @@ string tvpaths[] = '{
`COVERAGE,
"ieu",
"ebu",
"csrwrites"
"csrwrites",
"priv"
};
string coremark[] = '{

38
tests/coverage/priv.S Normal file
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@ -0,0 +1,38 @@
///////////////////////////////////////////
// priv.S
//
// Written: David_Harris@hmc.edu 23 March 2023
//
// Purpose: Test coverage for EBU
//
// A component of the CORE-V-WALLY configurable RISC-V project.
//
// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
//
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
//
// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
// except in compliance with the License, or, at your option, the Apache License version 2.0. You
// may obtain a copy of the License at
//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work distributed under the
// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
// either express or implied. See the License for the specific language governing permissions
// and limitations under the License.
////////////////////////////////////////////////////////////////////////////////////////////////
// load code to initalize stack, handle interrupts, terminate
#include "WALLY-init-lib.h"
main:
# switch to supervisor mode
li a0, 1
ecall
# Test read to stimecmp fails when MCOUNTEREN_TM is not set
csrr t0, stimecmp
j done