Commit Graph

5757 Commits

Author SHA1 Message Date
Kevin Kim
7512e55699 added python script
-I've been using this python script to make quick changes to the bitmanip controller
2023-03-04 22:54:32 -08:00
Kevin Kim
294e024c9b Merge branch 'bit-manip' of https://github.com/kipmacsaigoren/cvw into bit-manip 2023-03-04 22:44:09 -08:00
Kevin Kim
9494cf9340 removed rotate signal in datapath and instead packed into the new BALUControl Signal
- BALUControl contains Rotate, Mask, PreShift signals to select from the respective generation muxes in the ALU
2023-03-04 22:44:03 -08:00
Kip Macsai-Goren
4cede344a1 Merge remote-tracking branch 'upstream/main' into bit-manip 2023-03-04 14:43:12 -08:00
Kevin Kim
f5dca0bf4f zbc result mux is now structural 2023-03-04 09:22:21 -08:00
Kevin Kim
72de867e65 Rotate signal now gets generated in bmu ctrl 2023-03-03 22:57:49 -08:00
Kevin Kim
b315066b03 license comments 2023-03-03 21:52:34 -08:00
Kevin Kim
0403cfd41a removed redundant signals in controller 2023-03-03 21:52:25 -08:00
Kevin Kim
8dd39fbcfb b controller generates comparison signed flag and controller branch signed logic updated accordingly 2023-03-03 17:12:29 -08:00
Ross Thompson
da74ed0369 Merge pull request #126 from davidharrishmc/dev
ImperasDV setup
2023-03-03 18:01:32 -06:00
David Harris
a49f45f2f3 Setup ImperasDV if available 2023-03-03 15:54:35 -08:00
David Harris
d83edbf6d6 Merge pull request #125 from ross144/main
Modified Performance Counter Data Collection
2023-03-03 13:12:35 -08:00
Ross Thompson
b0a9499f86 Oups included the wave file in the wally-batch.do script. 2023-03-03 15:10:07 -06:00
Ross Thompson
486148b45d Fixed batch mode regression test to work with hpmc loggic.
Added logic to exclude the embench warmups from preformance counters.
2023-03-03 14:59:20 -06:00
Kevin Kim
5e01f86bc5 sltD signal debug. Passes regression 2023-03-03 12:44:33 -08:00
Kevin Kim
c836eea17c sltD logic optimize 2023-03-03 12:35:40 -08:00
Ross Thompson
0ecd1ef681 Setup the testbench to exclude the warmup from performance counter reports. 2023-03-03 13:10:01 -06:00
Kip Macsai-Goren
3891596962 Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-03 09:56:51 -08:00
Kip Macsai-Goren
1e1ce01fbb Merge branch 'main' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-03 09:56:34 -08:00
Kevin Kim
dfbdd6d939 Merge pull request #2 from kipmacsaigoren/bctrlmigrate
bctrl migration started
2023-03-03 09:56:25 -08:00
Kevin Kim
d6f8c1dd29 Merge branch 'bctrlmigrate' of https://github.com/kipmacsaigoren/cvw into bctrlmigrate 2023-03-03 09:54:08 -08:00
Kevin Kim
1c55d4a8d5 Merge branch 'openhwgroup:main' into bctrlmigrate 2023-03-03 09:53:59 -08:00
Kip Macsai-Goren
cf1e41a576 Merge remote-tracking branch 'upstream/main' into main 2023-03-03 09:48:13 -08:00
Kip Macsai-Goren
fcad531f59 Merge branch 'bit-manip' of github.com:kipmacsaigoren/cvw into bit-manip 2023-03-03 09:39:52 -08:00
Kip Macsai-Goren
6be322941d Merge remote-tracking branch 'upstream/main' into bit-manip 2023-03-03 09:36:44 -08:00
Kevin Kim
422b428cba removed outdated b-signals in controller 2023-03-03 08:45:42 -08:00
Ross Thompson
e70492ea3f Added performance new counter prints to testbench. 2023-03-03 10:42:52 -06:00
Kevin Kim
9cad890c1a comments to bctrl 2023-03-03 08:41:47 -08:00
Kevin Kim
19410b4196 migrated B-subarith logic into b controller 2023-03-03 08:40:29 -08:00
Kevin Kim
2c3271dd62 began subarith configurability optimization in controller 2023-03-03 08:27:11 -08:00
David Harris
27f669118d Merge pull request #124 from ross144/main
Added additional performance counters.  Ch 5 is update todate with these changes.
2023-03-03 06:15:49 -08:00
Ross Thompson
dc49c2612d Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-03 00:22:27 -06:00
Ross Thompson
0cb5369351 Renamed BTB misprediction to BTA. 2023-03-03 00:18:34 -06:00
Ross Thompson
5b5677ccb8 Added divide cycle counter. 2023-03-02 23:59:52 -06:00
Ross Thompson
aabb454d1c Added the i and d cache cycle counters. 2023-03-02 23:54:56 -06:00
Ross Thompson
cfca77172e Added fence counter. 2023-03-02 23:29:20 -06:00
Ross Thompson
f32f8c109a Added csr write counter, sfence vma counter, interrupt counter, and exception counter. 2023-03-02 23:21:29 -06:00
Ross Thompson
a313b10912 Added store stall to performance counters. 2023-03-02 23:10:54 -06:00
Ross Thompson
2dd693a3b3 Reordered performance counters and added space for new ones. 2023-03-02 23:04:31 -06:00
Ross Thompson
724f2634c5 Fixed bug in performance counter script. 2023-03-02 22:32:13 -06:00
Ross Thompson
1f3639bff6 Added support for branch target buffer stats. 2023-03-02 22:16:30 -06:00
David Harris
316b8b2250 Refactored Floating point division special case detection to avoid spurious trigger on Y for sqrt) 2023-03-02 20:00:47 -08:00
Kevin Kim
b21ca2fba0 bug fix, more elegant logic changes in controller 2023-03-02 16:00:56 -08:00
Kevin Kim
c9bd37c92b formatting 2023-03-02 15:28:43 -08:00
Kevin Kim
910eeea3ff removed main instruction decoder dependence on bmu controller 2023-03-02 15:28:33 -08:00
Kevin Kim
05b329dd6a added bitmanip illegal instruction signal 2023-03-02 15:09:55 -08:00
Kevin Kim
3e8e633a56 zbc comments 2023-03-02 13:52:00 -08:00
Kevin Kim
b0307f5082 formatted bmu decoder 2023-03-02 13:45:15 -08:00
Kevin Kim
24b0b83d52 moved ALUControlD into configurable block 2023-03-02 12:17:03 -08:00
Kevin Kim
0f60505179 moved SubArith and RegWriteE into configurable block 2023-03-02 12:15:57 -08:00