16 Commits

Author	SHA1	Message	Date
David Harris	6922298f21	Replaced FenceM with InvalidateICacheM for event counting of fence.i	2023-03-18 09:24:31 -07:00
David Harris	33fa7e4706	Simplified SLT and SLTU code in ALU	2023-03-09 15:14:52 -08:00
David Harris	7ecf4cdea8	Fixed bug about rv64 shifts only using 6 bits of funct7	2023-03-06 13:10:51 -08:00
David Harris	7e0c96cdcc	Simplified decoder default to illegal instruction	2023-03-06 11:21:11 -08:00
David Harris	c2efdbdbbb	More detailed decoding of load/store/branch/jump	2023-03-06 11:15:48 -08:00
David Harris	a56557d847	Improved decoding illegal instructions in controller	2023-03-06 11:02:42 -08:00
Ross Thompson	cfca77172e	Added fence counter.	2023-03-02 23:29:20 -06:00
David Harris	cf8b5f0783	Added support for ZMMUL	2023-02-27 07:29:53 -08:00
David Harris	a445e53e8d	Fixed Issue #106: fld rasies load access fault instead of illegal instruction. The IEU controller had considered all fp loads and stores to be legal regardless of whether the FPU is enabled or the type is supported. Merged illegal instruction detection from both units into the Decode stage, saving two bits of pipeline register as well.	2023-02-21 09:32:17 -08:00
David Harris	0d2baed943	Reverted lab3 changes in dev branch	2023-02-16 18:10:05 -08:00
David Harris	33eb5423cb	Update datapath.sv	2023-02-16 17:53:31 -08:00
David Harris	113b124721	Update controller.sv	2023-02-16 17:52:44 -08:00
David Harris	43afa34338	Update alu.sv	2023-02-16 17:52:25 -08:00
Ross Thompson	6fbca64eb7	Experimental branch prediction optimization.	2023-02-10 15:45:56 -06:00
Ross Thompson	ca0eb5a591	Modified branch predictor to use InstrValidE and InstrValidD rather than the more complex InstrClassE | WrongClassE logic.	2023-02-10 10:33:10 -06:00
David Harris	78eb90715c	Removed pipelined level of hierarchy	2023-02-02 14:14:11 -08:00