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Author SHA1 Message Date
Alec Vercruysse
570e86afc3 Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE 
To increase coverage. Read-only caches do not have flushes since
they do not have dirty bits.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
54df581ce6 make Cache Flush Logic dependent on !READ_ONLY_CACHE 
read-only caches do not have flush logic since they do not have to
deal with dirty bits.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
3419ef3651 remove ClearValid from cache 
The cachefsm hardwired ClearValid logic to zero.
This signal might've been added to potentially add extra functionality
later. Unless that functionality is added, however, it negatively
impacts coverage. If the goal is to maximize coverage, this signal
should be removed and only added when it becomes necessary.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
81125d3180 change i$ cachetagmem from ram1p1rwbe -> ram1p1rwe 
the byte write-enables were always tied high, so we can use
RAM without byte-enable to increase coverage.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
782feb6161 turn off ce coverage for ram1p1rwe 
According to the textbook, the cache memory chip enable,
`CacheEn`, is only lowered by the cachefsm with it is in the ready
state and a pipeline stall is asserted.

For read only caches, cache writes only occur in the state_write_line
state. So there is no way that a write would happen while the chip
enable is low.

Removing the chip-enable check from this memory to increase coverage
would be a bad idea since if anyone else uses this ram, the behaviour
would be differently than expected. Instead, I opted to turn off
coverage for this statement. Since this ram, which does not have a
byte enable, is used exclusively by read-only caches right now, this
should not mistakenly exclude coverage for other cases, such as D$.
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
8b6b96012d add ram1p1rwe for read-only cache ways (remove byte-enable) 
- increases coverage
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
2553321158 fix typo in cachway setValid input comment 2023-04-05 11:48:18 -07:00
Alec Vercruysse
9df246e5de put cacheLRU coverage explanation on another line 
the `: explanation` syntax was not working
 2023-04-05 11:48:18 -07:00
Alec Vercruysse
af113c7268 Exclude CacheLRU log2 function from coverage 2023-04-05 11:48:18 -07:00
David Harris
7c71c21810 Merge pull request #201 from ross144/main 
Improved d/i cache loggers
 2023-04-05 06:40:14 -07:00
Ross Thompson
02909b3c57 Fixed the d cache logger. 2023-04-04 14:19:19 -05:00
Ross Thompson
87e88a798f Improved d/i cache logger. 2023-04-04 13:38:32 -05:00
Ross Thompson
dd1cbbc6e1 Merge pull request #199 from davidharrishmc/dev 
Fixed WFI to commit when an interrupt occurs
 2023-04-04 11:34:24 -05:00
David Harris
4552f9cf8c Fixed WFI to commit when an interrupt occurs 2023-04-04 09:32:26 -07:00
David Harris
b4288bf53f Merge pull request #198 from eroom1966/main 
add support for Sstc
 2023-04-04 09:23:38 -07:00
eroom1966
adafc8037d add support for Sstc 2023-04-04 17:20:00 +01:00
Ross Thompson
52d1c19509 Merge pull request #194 from davidharrishmc/dev 
Bit manipulation support in ImperasDV.  Test improvements.
 2023-04-04 09:13:27 -05:00
David Harris
4ca30a5435 Merge pull request #196 from kipmacsaigoren/zbc_optimize 
bitmanip: simplify zbc input mux
 2023-04-04 06:27:47 -07:00
Kevin Kim
0a1adecf8a Merge branch 'openhwgroup:main' into zbc_optimize 2023-04-03 23:45:49 -07:00
Kevin Kim
acebdeeb81 reduced mux3 to mux2 for input signal to clmul 2023-04-03 22:53:46 -07:00
David Harris
64679654ff Merged priv.S edits 2023-04-03 18:07:14 -07:00
David Harris
a6117e9bef Updated imperas.ic to enable B extension 2023-04-03 17:55:30 -07:00
David Harris
fecdd6d139 Merge pull request #190 from SydRiley/main 
expanded ifu coverage including 4 added directed tests and 1 exclusion, expanded fpu coverage including 6 directed tests and 2 multiline exclusions
 2023-04-03 17:48:47 -07:00
David Harris
3ecbbcc617 Merge pull request #193 from ACWright256/main 
Hardware performance counterer registers test coverage
 2023-04-03 17:47:06 -07:00
Alexa Wright
c170777d63 Merge branch 'openhwgroup:main' into main 2023-04-03 14:30:54 -07:00
Sydeny
a0ecd83c47 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-03 13:41:55 -07:00
Ross Thompson
91e4e64f3d Merge pull request #178 from AlecVercruysse/coverage 
Improve I$ coverage by simplifying logic
 2023-04-03 14:22:46 -05:00
David Harris
4e2d80476e Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-04-03 06:13:16 -07:00
David Harris
ad0b430c63 Merge pull request #189 from kipmacsaigoren/bitmanip_cleanup 
Bitmanip: Removed Comparator Flag to ALU
 2023-04-03 06:04:58 -07:00
Sydeny
981e5bd5f6 Manual merge for fctrl.sv, fpu.S, and ifu.S files 2023-04-03 01:55:23 -07:00
Sydeny
17d41b4d52 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-04-03 01:54:27 -07:00
Sydney Riley
55655157ae expanded ifu coverage including 4 added directed tests and 1 exclusion, expanded fpu coverage including 6 directed tests and 2 multiline exclusions. 2023-04-02 23:51:34 -07:00
Kevin Kim
b38d34b925 Merge branch 'bitmanip_cleanup' of https://github.com/kipmacsaigoren/cvw into bitmanip_cleanup 2023-04-02 21:14:35 -07:00
Kevin Kim
8252706691 removed comparator flag to ALU 2023-04-02 21:14:31 -07:00
Kevin Kim
238e97d379 signal renaming on bitmanip alu and alu 2023-04-02 18:42:41 -07:00
David Harris
5712b905a7 Merge pull request #177 from amaiuolo/main 
Integrated tv generation for IFdivsqrt
 2023-04-02 18:29:38 -07:00
Kevin Kim
f175f7e927 changed signal names on clmul and zbc to match book 2023-04-02 18:28:09 -07:00
David Harris
f870b6ac1f Merge pull request #187 from stineje/main 
Update one bug in testfloat - still have to fix fpdiv but others shou…
 2023-04-02 18:27:39 -07:00
James Stine
e513c315c9 Update one bug in testfloat - still have to fix fpdiv but others should now all work 2023-04-02 18:16:23 -05:00
Alexa Wright
59596cd7cc Added tests for writing and reading to HPMCOUNTERM csrs 2023-04-01 16:02:23 -07:00
David Harris
c1ec1cb09c Added SSTC support to imperas.ic and wallyTracer. Fixes many of the privileged tests 2023-03-31 10:54:03 -07:00
David Harris
60a8a26f2e regression cleanup; unable to run buildroot coverage because of different config file 2023-03-31 09:59:38 -07:00
David Harris
69805b4a60 Regression update 2023-03-31 09:15:15 -07:00
David Harris
fa17487d67 Merged privileged test 2023-03-31 08:37:16 -07:00
David Harris
db542543cb Coverage improvement: ieu, hazard, priv 2023-03-31 08:34:34 -07:00
David Harris
fd0c9e973d Coverage improvements in ieu, hazard units 2023-03-31 08:33:46 -07:00
David Harris
ab82bb397c Privilege test improvements 2023-03-31 08:32:02 -07:00
David Harris
0b5bc37424 Merge pull request #180 from infinitymdm/main 
Remove some fpu/fctrl test cases from coverage statistics
 2023-03-31 08:31:08 -07:00
Marcus Mellor
fd08ff2e60 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-03-31 10:29:10 -05:00
Mike Thompson
9abfef7c39 Merge pull request #179 from davidharrishmc/dev 
Fixed broken regression: privileged tests and build root
 2023-03-31 10:56:27 -04:00