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196 Commits

Author SHA1 Message Date
Ross Thompson
4634756e20 Change to flash-sd.sh to fix relative path to device tree. 2023-10-13 12:30:21 -05:00
Jacob Pease
03ea0a02e0 Merge branch 'main' of github.com:openhwgroup/cvw 2023-10-10 16:48:53 -05:00
Ross Thompson
d23eda1305 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-10-03 17:43:29 -05:00
Ross Thompson
3156d5abab Somehow the arty A7 was missing the update for the console baud rate setting. 2023-10-03 17:37:13 -05:00
Jacob Pease
961cf91482 Linux Makefile: Fixed find utility crashing for real this time. 2023-09-26 15:16:45 -05:00
Ross Thompson
e6672c2818 add c++ support to buildroot's config file. 
this is needed for running tensorflow's benchmark.
 2023-09-25 18:16:58 -05:00
Jacob Pease
0215c37594 Fixed error with finding vmlinux and busybox directories too early. 2023-09-25 18:04:51 -05:00
Jacob Pease
fa185e78a2 Merge branch 'main' of github.com:openhwgroup/cvw 2023-09-03 00:15:30 -05:00
Jacob Pease
eb07e8917e Linux Makefile can now dynamically find binaries for object dumps. 2023-08-31 23:58:10 -05:00
Jacob Pease
dd835e2a33 Merge branch 'main' of github.com:openhwgroup/cvw 2023-08-29 14:53:02 -05:00
Ross Thompson
b512dfa9ec Enables PBMT and adds zsh, coremark, dhrystone, and whetstone to linux configurations. 2023-08-29 13:35:48 -05:00
Jacob Pease
8a62a45137 Set default baud rate of serial output to 115200 for the VCU108. 2023-08-25 17:44:06 -05:00
Ross Thompson
055e00b8ac Pushed vcu118 to 71MHz. 2023-08-25 17:04:50 -05:00
Ross Thompson
b3577ed448 Merge branch 'main' of github.com:ross144/cvw 2023-08-25 17:03:33 -05:00
Ross Thompson
c93e3c451a Fixed the sdc linux bug which preventing loading the driver. The irq lock was not correctly initalized. 2023-08-25 17:01:38 -05:00
Jacob Pease
1e834f2d5f Minor color adjustment 2023-08-23 12:42:20 -05:00
Jacob Pease
494efe16ac Minor formatting adjustments. 2023-08-23 10:54:35 -05:00
Jacob Pease
604c40243b Updated README to explain usage of flash-sd.sh 2023-08-23 10:22:55 -05:00
Jacob Pease
1ff3f74888 Fixed order of binary variables so that they're defined with the specified buildroot location. 2023-08-22 15:32:10 -05:00
Jacob Pease
acc303fbf1 Added ability to specify device tree to flash-sd. It also will generate the device tree files inside the specified buildroot directory 2023-08-22 13:59:36 -05:00
Jacob Pease
2bf6207919 Added help option to the flash-sd script. 2023-08-22 13:37:33 -05:00
Jacob Pease
e489ede51d Merge branch 'main' of github.com:openhwgroup/cvw 2023-08-21 16:10:09 -05:00
Jacob Pease
a3158af72b Made the flash-sd script better. It takes options to wipe the sdcard and to specify a different buildroot directory. 2023-08-21 16:04:18 -05:00
David Harris
d801916d97 Merge pull request #383 from ross144/main 
Adds Zicbom support for D-cache only.  I-cache not yet supported.  Tests 32 and 64 bit versions.  Please rebuild regressions wally32 and wally64.  To save rebuild time edit lines 11-12 of tests/riscof/Makefile
 2023-08-21 13:32:00 -07:00
Jacob Pease
298708e1cb Removed newer unimplemented features from Linux configuration. 2023-08-21 14:00:27 -05:00
Jacob Pease
bb8d3806d6 Cleaned up some things. 2023-08-11 16:22:12 -05:00
Jacob Pease
2be76bd6f8 Added a table of contents to the linux readme. 2023-08-11 15:48:49 -05:00
Jacob Pease
4b22d137f8 Added instructions on disassembly to the README for Linux. 2023-08-11 13:11:06 -05:00
Jacob Pease
5f0edbd825 Added details to the README.md for linux. 2023-08-11 12:27:23 -05:00
Jacob Pease
027190ecc9 Added a README.md for the linux directory. WIP. 2023-08-11 12:11:56 -05:00
Jacob Pease
40096ac662 Fixed bugs. Added an 'all' target that performs the whole process of building the images needed for booting linux, including device tree files. 2023-08-09 12:31:14 -05:00
Jacob Pease
1582376d71 Fixed device tree generation make rule. Make targets are simplified. 2023-08-09 00:22:20 -05:00
Jacob Pease
52d3d8a9f4 Stopped makefile from crashing when patch is already applied. 2023-08-06 18:50:37 -05:00
Jacob Pease
1de7cc7347 Fixed Makefile bugs, and removed old code. 2023-08-05 15:27:17 -05:00
Jacob Pease
ca1a9c577c Created dependency tree for patch target in the linux subdirectory Makefile. 2023-08-05 13:28:33 -05:00
Jacob Pease
d4405da703 flash-sd.sh fixed. GPT table is now destroyed before re-partioning, thus avoiding backup table collisions. 2023-08-04 17:28:22 -05:00
Jacob Pease
356a0dbdde Makefile dynamically generates all device tree files now. 2023-08-04 13:56:03 -05:00
Jacob Pease
9d5fb35ca5 Added device tree generation to Linux directory Makefile. Exits on not finding output/images folder in buildroot directory. 2023-08-02 19:26:35 -05:00
Jacob Pease
057d9e47e3 Updated linux config. Works in QEMU now. 2023-08-02 18:59:42 -05:00
Ross Thompson
fcf9adae8c Merge branch 'main' of github.com:ross144/cvw 2023-08-02 16:51:42 -05:00
Ross Thompson
cab40e618f Updateds to vcu118 constraints and device tree. 2023-08-02 16:51:32 -05:00
Jacob Pease
4084a11350 Adjusted the new makefile. 2023-08-02 16:24:20 -05:00
Jacob Pease
064e863476 Buildroot can now be set up with the new Linux Makefile. The driver can now also be loaded from addins/vivado-risc-v and should be removed from the main Wally repo. A sed command customizes the package source location for the new buildroot directory. 2023-08-02 16:12:26 -05:00
Jacob Pease
e0a63f79ce Removed duplicate line in Makefile. 2023-08-02 14:59:20 -05:00
Jacob Pease
7c1d7b07bb Linux makefile now copies the package contents with the correct package source. 2023-08-02 14:56:23 -05:00
Jacob Pease
068a0d10fd Added a Makefile to the Linux directory to take care of the Buildroot setup and other dependencies. 2023-08-02 14:28:17 -05:00
Ross Thompson
83bb99756b Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-08-01 12:57:20 -05:00
Jacob Pease
337f5fadc7 Updated driver for latest version of linux 2023-08-01 12:56:16 -05:00
Ross Thompson
2a0b307608 Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-08-01 11:04:26 -05:00
Jacob Pease
3deff32639 Updated linux and buildroot configs initial commit. 2023-08-01 10:55:46 -05:00
Ross Thompson
06efd2cdde Pushed performance of arty a7 to 23Mhz. 2023-07-31 14:13:09 -05:00
Jacob Pease
55055aa0a8 Updated VCU108 device tree for 256MB memory. 2023-07-27 17:44:31 -05:00
Ross Thompson
dbf9e5da0b Updated Arty A7 fpga config and device tree to 256MiB main memory. 2023-07-25 15:11:47 -05:00
Ross Thompson
e99c6e5e1d Updated arty a7 device clock speed for 20Mhz. 2023-07-24 11:50:00 -05:00
Ross Thompson
49b87d4550 Merge branch 'main' of github.com:ross144/cvw 2023-07-24 10:47:05 -05:00
Ross Thompson
065e5e98c9 Improved timing constraints for arty a7 to push clock speed to 20Mhz. 2023-07-24 10:46:49 -05:00
Ross Thompson
481f27e3fe Updated arty a7 device tree. 2023-07-21 19:08:45 -05:00
Ross Thompson
ab6ef5bb58 At least it simulates and gets through fpga elaboration. 2023-07-21 18:40:26 -05:00
Ross Thompson
a89a1e675c Merge branch 'boot' into mergeBoot 
Merges Jacob's new sdc controller into wally.
 2023-07-21 17:43:45 -05:00
Ross Thompson
d04d2afed2 Modified the LSU/IFU and caches to improve critical path. Arty A7 went from 15 to 17Mhz. I believe we can push all the way to 20+Mhz with relatively little effort. Along the way I'm fixing up the scripts build the linux images for the flash card. 2023-07-21 13:06:27 -05:00
Jacob Pease
380d96b359 Working new boot process. Buildroot package for sdc. 2023-07-20 14:15:59 -05:00
Ross Thompson
b756b248b4 Wow. The newest version of Vivado does not like the enums as parameters. 
The solution is simple.  I changed the type to logic [31:0] and defined macros for the branch predictor types as 32 bit integers.
 2023-07-18 15:07:10 -05:00
Ross Thompson
d1ea52f6ea Added artya7 device tree. 2023-07-17 16:01:02 -05:00
Jacob Pease
b3aaa87cba Modified bootloader to access GUID partitions. SDC interrupt to PLIC. 
Since writing an SD card image generation script, the bootloader
needed to be altered to access individual binaries from specific
partitions. A new file, gpt.c with it's header gpt.h, have been added
to the bootloader to facilitate this.

The SDC has been added to the device tree for the VCU108
board. Additionally the SDC interrupt signal was added to the PLIC
node in the device tree. The PLIC itself  was modified to accept the
SDC interrupt signal.
 2023-07-14 13:36:44 -05:00
Ross Thompson
cf00f85456 Updated vcu118 constraints to run cpu at 38.43Mhz. 2022-11-15 10:19:38 -06:00
Ross Thompson
cc80f1f7b2 Bumped DDR4 clock speed up from 832Mhz (1666 MT/s) to 1200 Mhz (2400 MT/s). 
Increased CPU clock speed from 30 Mhz to 35 Mhz.
 2022-11-11 15:33:03 -06:00
Ross Thompson
d58a862f59 Added new device trees for vcu118 and vcu108 boards. 2022-10-24 17:45:10 -05:00
Ross Thompson
897982400c Updated the device tree to use 30Mhz instead of 10Mhz for the cpu timebase. 2022-10-20 15:05:39 -05:00
slmnemo
a5d5bd272b changes suggested by ben, hopefully fixing buildroot (which is now not running) 2022-05-20 18:42:38 -07:00
bbracker
871f63374e upgrade Buildroot Makefile to also copy over vmlinux 2022-04-25 07:36:59 -07:00
bbracker
27920d3504 less hardcoded paths in Makefile 2022-04-21 20:42:02 -07:00
David Harris
5c607f2b6b Simplified profile for UART boot; added warnings on UART Rx errors 2022-04-21 04:54:45 +00:00
bbracker
3aec080e15 parsePlicState.py bugfix 2022-04-13 13:04:43 -07:00
bbracker
52ed99ca1b improve testbench-linux.sv to correctly load in PLIC IntEnable checkpoint and to handle edge case where interrupt is caused by enabling interrupts in SSTATUS 2022-04-13 03:37:53 -07:00
bbracker
6c56f52e7c fix bugs in PLIC checkpoint state parsing 2022-04-13 01:59:21 -07:00
bbracker
777de6e05b whoops fix address for PLIC int enables in checkpoint generation 2022-04-13 01:36:09 -07:00
bbracker
3c1deb551d deprecate remove_dup.awk in favor of expanding parseGDBtoTrace.py to internally remove duplicates; this way the instruction counts in traps.txt are hopefully now in sync with the line numbers of all.txt 2022-04-07 19:43:22 -07:00
bbracker
1e5e2704f7 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-07 08:37:44 -07:00
bbracker
95438fca0d fix parseQEMUtoGDB.py to pass on interrupt messages correctly 2022-04-07 04:47:15 -07:00
kaveh Pezeshki
7b85b39c48 using -S for busybox objdump to provide source code snippets 2022-04-06 23:06:49 +00:00
bbracker
241ec053e8 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-04-06 07:50:57 -07:00
bbracker
c9c75d2e3e filter traps list down to just interrupts 2022-04-06 07:49:44 -07:00
bbracker
241100c6ac change RAM size in genInitMem.sh 2022-04-06 07:49:04 -07:00
David Harris
c22d6f2848 Added bootmem source ccode 2022-04-05 23:22:53 +00:00
David Harris
4f7c37e406 Changed Linux disassembly to -S to preserve source code lines 2022-04-01 16:49:13 +00:00
bbracker
6fc54435c5 checkpointSweep is bash-specific, so add shebang to make it so 2022-03-28 13:40:50 -07:00
bbracker
2900117341 fix genCheckpoint.sh binary memory dump 2022-03-27 20:54:59 -07:00
bbracker
6b812f33e1 change genCheckpoint.sh to only log 128MB of RAM 2022-03-27 19:16:39 -07:00
bbracker
284f1ab75e fix parseGDBtoTrace.py to expect the CSRs that QEMU actually prints out 2022-03-27 19:05:44 -07:00
bbracker
d1e4b61aa3 refactored buildroot configuration 2022-03-27 15:13:03 -07:00
bbracker
6b2474a306 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-03-27 15:11:42 -07:00
bbracker
3dcb87473b change devicetree to expect only 128MB of RAM 2022-03-27 15:11:36 -07:00
bbracker
b08066381a fix multiple-context PLIC checkpoint generation 2022-03-25 01:02:22 +00:00
bbracker
9f60256f22 1st attempt at multiple channel PLIC 2022-03-24 17:08:10 -07:00
Ross Thompson
7fc128ba7c added SIP, SIE, and SSTATUS to checkpoints. Can't seem to get the linux testbench to force SIP. 2022-03-22 21:28:34 -05:00
bbracker
e3303331ef change genTrace to dump UART output to file so we can see how far parsing got 2022-03-08 09:52:17 -08:00
bbracker
51e68819c4 fix up PLIC and UART checkpointing 2022-03-07 23:48:47 -08:00
bbracker
9dbcdca433 change UART state saving to temporarily modify LCR so that DLAB=0 when reading addresses 0 and 1 so that we get RBR and IER instead of divisor latch registers 2022-03-07 22:12:08 -08:00
bbracker
52bfd65fd3 change checkpoint generation to integrate GDB scripting more cleanly and save UART and PLIC state 2022-03-07 17:59:49 -08:00
bbracker
a93f36824d modify debug.sh to not rely on external GDB script 2022-03-07 11:56:04 -08:00