David Harris
|
9809e57d0c
|
Replacing XE and DE with SrcAE and SrcBE in divider
|
2021-10-03 11:11:53 -04:00 |
|
David Harris
|
8f36297569
|
Added suffixes to more divider signals
|
2021-10-03 00:32:58 -04:00 |
|
David Harris
|
24bb3f4baf
|
Added more pipeline stage suffixes to divider
|
2021-10-02 22:54:01 -04:00 |
|
David Harris
|
fe69513bb7
|
Partial divider cleanup
|
2021-10-02 20:55:37 -04:00 |
|
David Harris
|
d4437b842a
|
Divider code cleanup
|
2021-10-02 10:13:49 -04:00 |
|
David Harris
|
0e0e204d3d
|
Moved negating divider otuput to M stage
|
2021-10-02 10:03:02 -04:00 |
|
bbracker
|
5e9a39e755
|
fixed bug where M mode was sensitive to S mode traps
|
2021-09-07 19:14:39 -04:00 |
|
bbracker
|
28fed18421
|
No longer forcing CSRReadValM because that can feedback to corrupt some CSRs
|
2021-09-06 22:59:54 -04:00 |
|
bbracker
|
58d478eb23
|
restore functionality of being able to turn on waves at a certain instruction count; restore linux-waves.do because wave.do seems to be in disrepair
|
2021-09-04 19:45:04 -04:00 |
|
Ross Thompson
|
cd8a66353c
|
Patched up changes for wally-pipelined.do and wally-buildroot.do to support moved common testbench files.
|
2021-07-30 14:24:50 -05:00 |
|
bbracker
|
9dcd5d3622
|
fix UART RX FIFO bug where tail pointer can overtake head pointer
|
2021-07-22 02:09:41 -04:00 |
|
bbracker
|
cdcf419147
|
make address translator signals visible in waveview
|
2021-07-21 20:07:49 -04:00 |
|
bbracker
|
77b690faf0
|
make testbench check the same CSRs that QEMU logs; change CLINT to reset MTIMECMP to -1 so that we don't instantly get a timer interrupt upon reset
|
2021-07-19 15:13:03 -04:00 |
|
bbracker
|
64a81941ff
|
change memread testvectors to not left-shift bytes and half-words
|
2021-07-18 21:49:53 -04:00 |
|
bbracker
|
f4f3ef0307
|
linux testbench progress
|
2021-07-18 18:47:40 -04:00 |
|
bbracker
|
ac908bc2e4
|
swapped out linux testbench signal names
|
2021-07-17 14:46:18 -04:00 |
|
bbracker
|
d38109bc1c
|
changed stop of linux boot from arch_cpu_idle to do_idle
|
2021-07-16 12:27:15 -04:00 |
|
Katherine Parry
|
0cc07fda1b
|
Almost all convert instructions pass Imperas tests
|
2021-07-11 18:06:33 -04:00 |
|
David Harris
|
e65fb5bb35
|
Added F_SUPPORTED flag to disable floating point unit when not in MISA
|
2021-07-05 10:30:46 -04:00 |
|
David Harris
|
c897bef8cd
|
Moved BOOTTIM to 0x1000-0x1FFF. Added logic to detect an access to undefined memory and assert HREADY so bus doesn't hang.
|
2021-07-04 01:19:38 -04:00 |
|
bbracker
|
9927f771cc
|
linux testbench now ignores HWRITE glitches caused by flush glitches
|
2021-06-25 09:28:52 -04:00 |
|
bbracker
|
b84419ff4e
|
overhauled linux testbench and spoofed MTTIME interrupt
|
2021-06-24 01:42:35 -04:00 |
|
David Harris
|
718630c378
|
Reduced complexity of pmpadrdec
|
2021-06-23 03:03:52 -04:00 |
|
bbracker
|
6e9c6e3e6a
|
whoops wavedo typo
|
2021-06-20 05:36:54 -04:00 |
|
bbracker
|
9469367da3
|
make buildroot ignore SSTATUS because QEMU did not originally log it
|
2021-06-20 05:31:24 -04:00 |
|
bbracker
|
3e32ba3684
|
make buildroot waves only turn on after a user-specified point
|
2021-06-20 00:39:30 -04:00 |
|
bbracker
|
832e4fc7e3
|
making linux waveforms more useful
|
2021-06-17 08:37:37 -04:00 |
|
bbracker
|
8338b3bd34
|
expanded GPIO testing and caught small GPIO bug
|
2021-06-03 10:03:09 -04:00 |
|
bbracker
|
28abd28b1f
|
fixed InstrValid signals and implemented less costly MEPC loading
|
2021-06-02 10:03:19 -04:00 |
|
bbracker
|
a45b61ede9
|
turns out I should not have tried renaming FStallD to FPUStallD because that name was already used! All the same it does feel weird to have two such signals floating around \(ah pun!\)
|
2021-05-28 23:11:37 -04:00 |
|
bbracker
|
142b02b30a
|
improved PLIC test organization
|
2021-05-21 15:13:02 -04:00 |
|
Katherine Parry
|
71e4a10efb
|
FMV.D.X imperas test passes
|
2021-05-20 22:17:59 -04:00 |
|
bbracker
|
114bba8370
|
small bit of busybear debug progress
|
2021-05-19 20:18:00 -04:00 |
|
James E. Stine
|
97cbdae674
|
Updates on Divide - pushed in working version of DIV64U for Divide and REmainder. Will do 32-bit version tomorrow as well as Signed version
|
2021-05-17 16:48:51 -05:00 |
|
Thomas Fleming
|
94d734cca9
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
|
2021-05-03 14:02:19 -04:00 |
|
bbracker
|
1db608fbc6
|
small rv64 plic test bugfix
|
2021-05-03 10:06:44 -04:00 |
|
Thomas Fleming
|
10c7260980
|
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
|
2021-04-29 16:30:00 -04:00 |
|
Jarred Allen
|
c6996ce39d
|
Remove signal which no longer exists from default waves, so sim-wally works
|
2021-04-29 14:41:10 -04:00 |
|
Thomas Fleming
|
d29ddddc3f
|
Remove unused waves from .do files
|
2021-04-29 02:19:46 -04:00 |
|
Noah Boorstin
|
24bbb674d3
|
linux: start using internal branch predictor signal
|
2021-04-26 14:34:38 -04:00 |
|
Ross Thompson
|
44d28dbd1c
|
Icache integrated!
Merge branch 'icache-almost-working' into main
|
2021-04-26 11:48:58 -05:00 |
|
bbracker
|
8d77012995
|
progress on bus and lrsc
|
2021-04-26 07:43:16 -04:00 |
|
bbracker
|
5687ab1c96
|
do script refactor
|
2021-04-24 09:32:09 -04:00 |
|
Jarred Allen
|
59b340dac9
|
Merge branch 'main' into cache
|
2021-04-19 00:05:23 -04:00 |
|
bbracker
|
195cead01c
|
working GPIO interrupt demo
|
2021-04-15 21:09:15 -04:00 |
|
Jarred Allen
|
6ce4d44ae1
|
Merge from branch 'main'
|
2021-04-08 17:19:34 -04:00 |
|
bbracker
|
c8c87bd0d8
|
merge testbench
|
2021-04-08 14:28:01 -04:00 |
|
bbracker
|
ce7b2314ef
|
Yee hoo first draft of PLIC plus self-checking tests
|
2021-04-04 06:40:53 -04:00 |
|
James E. Stine
|
9026357350
|
Added some updates to divider - still not working all the time. Still a bug with signals within muldiv - specificaly MultDivE being modified during Execute stage. Seems to be triggered by ahblite signal.
|
2021-04-02 06:27:37 -05:00 |
|
ushakya22
|
ba01d57767
|
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
|
2021-03-30 15:25:07 -04:00 |
|