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474 Commits

Author SHA1 Message Date
David Harris
a9fd6e6cfb Added more RV64I coverage generation 2024-07-22 08:52:19 -07:00
David Harris
bf9442c5a5 Added QuestaFunctCoverage to merge functional coverage reports 2024-07-22 08:49:54 -07:00
David Harris
0781a32991 Removed more obsolete imperas scripts 2024-07-21 19:47:23 -07:00
David Harris
d6be3bdc4e Fixed makefile log typo 2024-07-21 19:47:00 -07:00
David Harris
e8caf1717d Removed outdated wally-imperas files 2024-07-21 19:45:22 -07:00
Rose Thompson
f84aa40b13 Fixed wally.do to correctly log functional coverage. 2024-07-16 15:52:52 -05:00
David Harris
fa75077d2f More attempts at functional coverage 2024-07-15 15:34:44 -07:00
David Harris
2c487935e6 Attempt at functional coverage; breaks code and functional coverage 2024-07-15 14:20:48 -07:00
David Harris
04cd2c8ea4 Renamed --coverage to --ccov and moved UCDB files to questa/ucdb 2024-07-15 05:32:16 -07:00
David Harris
ced8038343 Defined memory to be inaccessible by default 2024-07-05 08:34:28 -07:00
David Harris
12717a65f2 Fixed location of imperas.ic with new misa_B_Zba_Zbb_Zbs 2024-07-04 12:29:59 -07:00
David Harris
775930ae4f Fixes to memfile generation for rv32. Updated new misa.B in imperas.ic, but need new version of ImperasDV to test 2024-07-04 07:36:56 -07:00
David Harris
af4403342f renamed run_vcs.py to run_vcs, added instr/data in ebu 2024-07-03 08:02:38 -07:00
David Harris
1b62d2116a VCS lockstep working 2024-07-02 18:05:13 -07:00
David Harris
aff0ad9c02 Progress on VCS; run_vcs rewritten in Python to ease passing parameters 2024-07-02 14:23:34 -07:00
David Harris
c972a914c8 Removed +plusarg_save because it doesn't silence VCS 2024-06-28 07:48:01 -07:00
David Harris
4a3532bf5a VCS lockstep progress 2024-06-28 07:19:03 -07:00
David Harris
6cf250821d Added VCS +plusarg_save to silence compiler 2024-06-28 06:53:44 -07:00
David Harris
e795143983 Turned off debug access to speed up VCS 2024-06-28 06:43:14 -07:00
David Harris
31b54fb247 Progress on VCS lockstep 2024-06-27 11:16:17 -07:00
Jordan Carlin
b76941d278
Use VCS built-in default macro instead of defining SIM_VCS 2024-06-21 15:17:59 -07:00
Rose Thompson
46ace521c6 Updated verilator makefile. 2024-06-19 16:25:31 -05:00
Ross Thompson
2d8973df1d Updated wavefile to use new names. 2024-06-19 13:57:28 -07:00
Ross Thompson
64712d2243 Updated wave to match changes in testbench. 2024-06-19 13:51:50 -07:00
Ross Thompson
ab1ee3d69b Removed *** from IFU, lrcs. 2024-06-19 09:40:35 -07:00
Jordan Carlin
00ccd80479
Update VCS RTL file exclusions with renamed ram 2024-06-18 22:47:00 -07:00
David Harris
bfd3c9fe86 Fixed gettenvval when variable is undefined per verilator Issue 5179 2024-06-14 07:09:53 -07:00
Rose Thompson
a88d5f403b Functional coverage works with wally.do 2024-05-28 14:02:54 -05:00
Rose Thompson
0c5b70c40a It's a bit hacky. But I've got functional coverage working with our wally.do script and testbench.sv. 2024-05-28 13:54:48 -05:00
Rose Thompson
48fd365b9d Still don't understand why wally.do can't load testbench.sv with functional coverage. But wally-imperas-cov.do can load testbench.sv with functional coverage. 2024-05-28 13:00:17 -05:00
Rose Thompson
4a1e856b18 Almost working functional coverage in wally.do 
riscvISACOV is now loading, but for some reason I still cannot get it to record anything.
Instead it is just logging the instructions.
 2024-05-27 18:15:12 -05:00
Rose Thompson
92ee56c1a1 Yay. Finally found the bug which prevented wally.do from having functional coverage using riscvISACOV. 
testbench.sv was missing the trace2cov instance.
 2024-05-27 17:25:20 -05:00
Rose Thompson
4c0261fd2c Closer. Needed to reorder includes and defines. 2024-05-27 15:37:16 -05:00
Rose Thompson
ff611016c7 Closer? 2024-05-27 14:11:02 -05:00
Rose Thompson
2985cfb7eb Preliminary work to merge functional coverage into wally.do. 2024-05-27 11:59:13 -05:00
Jordan Carlin
6a2192db6e
Revert "Remove existing derived configs before creating new ones" 2024-05-23 13:56:38 -07:00
Jordan Carlin
fb8e97dd04
Remove existing derived configs before creating new ones 2024-05-23 13:17:24 -07:00
Rose Thompson
a885240fbd temporary commit to help debug merging testbench.sv with testbench-imperas.sv 2024-05-17 12:36:00 -05:00
Rose Thompson
bd8450734b Fixed more bugs with wally.do. 2024-05-17 10:39:00 -05:00
Rose Thompson
46e6459965 Updated script to run linux with imperasDV. 2024-05-14 13:46:27 -05:00
Rose Thompson
970af9551c Fixed bug with gui mode testbench_fp 
removed old wally-linux-imperas.do
 2024-05-14 13:41:20 -05:00
Rose Thompson
30bea18dec Maybe have imperasDV linux simulation merged into wally.do 2024-05-14 12:38:19 -05:00
Rose Thompson
e8f5545076 Got imperasDV running linux simulation again. 
Now need to merge do files.
 2024-05-13 16:43:13 -05:00
Rose Thompson
ceb31fec68 Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:54:23 -05:00
Rose Thompson
b027fa44ef Merge branch 'main' of https://github.com/openhwgroup/cvw 2024-05-10 08:53:00 -05:00
Rose Thompson
93ea5b0c1e Fixed wavefile to have function logger. 2024-05-10 08:50:42 -05:00
David Harris
04457d49f7 Updated sim-testfloat-verilator to use wsim 2024-05-10 05:03:24 -07:00
David Harris
61e559606e Fixed wsim to be able to invoke TestFloat with Verilator. However, TestFloat produces incorrect results with Verilator 2024-05-09 18:56:59 -07:00
David Harris
0d1d59a3d8 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2024-05-08 18:58:01 -07:00
Divya2030
eff2264752 Code Coverage Text format for each test and configuration in IndividualCovReport 2024-05-08 05:24:24 -07:00