Github_Repos/cvw
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6 Commits

Author SHA1 Message Date
Rose Thompson
fc80bf1251 More updates to fpga IP module names. 2024-08-22 14:31:39 -07:00
Ross Thompson
9ba487c323 Setup to run with both the vcu108 and vcu118 boards. Set the parameters in the Makefile. 2022-10-24 15:38:39 -05:00
Ross Thompson
7d0462dc59 UART and clock speed changes to support 30Mhz. 2022-04-12 17:56:36 -05:00
Ross Thompson
7abde2b566 Increazed fpga clock speed to 35Mhz. 
linux boot is much faster.
 2022-04-05 15:09:49 -05:00
Ross Thompson
64846c800e Constraint changes for 40Mhz wally. 2022-04-04 10:50:48 -05:00
Ross Thompson
1117b90f40 Created Makefile to manage IP generation. 2021-11-29 18:33:58 -06:00