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Created Makefile to manage IP generation.

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This commit is contained in:
Ross Thompson 2021-11-29 18:32:51 -06:00
parent 84116a756e
commit 1117b90f40
6 changed files with 13 additions and 0 deletions
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1
.gitignore vendored
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@ -35,3 +35,4 @@ tests/linux-testgen/buildroot-config-src/linux.config.old
tests/linux-testgen/buildroot-config-src/busybox.config.old
wally-pipelined/regression/slack-notifier/slack-webhook-url.txt
wally-pipelined/regression/logs
fpga/generator/IP

12
fpga/generator/Makefile Normal file
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@ -0,0 +1,12 @@
dst := IP
all: $(dst)/xlnx_proc_sys_reset.log \
$(dst)/xlnx_ddr4.log \
$(dst)/xlnx_axi_clock_converter.log \
$(dst)/xlnx_ahblite_axi_bridge.log
$(dst)/%.log: %.tcl
mkdir -p IP
cd IP;\
vivado -mode batch -source ../$*.tcl | tee $*.log

0
fpga/generator/ahblite_axi_bridge.tcl → fpga/generator/xlnx_ahblite_axi_bridge.tcl
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0
fpga/generator/axi_clock_converter.tcl → fpga/generator/xlnx_axi_clock_converter.tcl
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0
fpga/generator/ddr4_mig.tcl → fpga/generator/xlnx_ddr4.tcl
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0
fpga/generator/proc_sys_reset.tcl → fpga/generator/xlnx_proc_sys_reset.tcl
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