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Author	SHA1	Message	Date
Kevin Kim	11f165d1bb	migrated B-subarith logic into b controller	2023-03-03 08:40:29 -08:00
Kevin Kim	b5a5f364e1	began subarith configurability optimization in controller	2023-03-03 08:27:11 -08:00
Kevin Kim	f4b8968e12	bug fix, more elegant logic changes in controller	2023-03-02 16:00:56 -08:00
Kevin Kim	2a0c59d5a7	formatting	2023-03-02 15:28:43 -08:00
Kevin Kim	d0c486df54	removed main instruction decoder dependence on bmu controller	2023-03-02 15:28:33 -08:00
Kevin Kim	11a977ffe3	added bitmanip illegal instruction signal	2023-03-02 15:09:55 -08:00
Kevin Kim	b52208b539	zbc comments	2023-03-02 13:52:00 -08:00
Kevin Kim	2d7d143f6d	formatted bmu decoder	2023-03-02 13:45:15 -08:00
Kevin Kim	1b222f91be	moved ALUControlD into configurable block	2023-03-02 12:17:03 -08:00
Kevin Kim	1e1ecaafb1	moved SubArith and RegWriteE into configurable block	2023-03-02 12:15:57 -08:00
Kevin Kim	7dd4a2e975	added BRegWriteE signal	2023-03-02 12:15:22 -08:00
Kevin Kim	d40f3b2a1c	rename shifternew to shifter	2023-03-02 11:45:32 -08:00
Kevin Kim	905373d53b	zbc input select mux optimize	2023-03-02 11:43:05 -08:00
Kevin Kim	2bfbf051a5	zbc select mux optimization	2023-03-02 11:40:29 -08:00
Kevin Kim	44d40afca8	fixed controller lint, changed byte unit mux select name and input width	2023-03-02 11:36:12 -08:00
Kevin Kim	96995c5593	removed redundant zbs	2023-03-02 11:22:09 -08:00
Kip Macsai-Goren	9e52ede0cd	Merge remote-tracking branch 'upstream/main' into bit-manip	2023-02-28 14:41:51 -08:00
Kip Macsai-Goren	2cab4a2f0a	Merge remote-tracking branch 'origin' into bit-manip	2023-02-28 14:39:57 -08:00
Kevin Kim	036cad71c6	bitmanip decoder spits out regwrite, w64, and aluop signals [NEEDS DEBUG]	2023-02-28 12:09:35 -08:00
Kevin Kim	6835a635cc	added BRegWrite, BW64, BALUOp signals to bctrl and controller ... -TODO: Main decode in bmuctrl must assert these 3 signals	2023-02-28 11:54:10 -08:00
Kevin Kim	82059fba67	changed shifter source select signal name	2023-02-28 11:41:40 -08:00
Kevin Kim	30ef1ac9e3	rename result back to ALUResult in ALU	2023-02-28 07:27:34 -08:00
Ross Thompson	1f10092f8f	Merge pull request #117 from davidharrishmc/dev ... ZMMUL support and MMU cleanup	2023-02-27 09:46:40 -06:00
David Harris	5c8fee127b	Added support for ZMMUL	2023-02-27 07:29:53 -08:00
David Harris	0d3d499940	hptw typo fix	2023-02-26 19:38:34 -08:00
David Harris	907fbfec38	Simplified Access fault logic in HPTW	2023-02-26 18:50:37 -08:00
David Harris	fa5be45dcd	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-26 18:35:14 -08:00
David Harris	d3f5708ded	StoreAmo faults are generated instead of load faults on AMO operations	2023-02-26 18:35:10 -08:00
David Harris	d2fd34efe6	Renamed DAPageFault to UpdateDA	2023-02-26 17:51:45 -08:00
David Harris	246deeda82	renamed UpperBitsUnequalPageFault to UpperBitsUnequal	2023-02-26 17:32:34 -08:00
David Harris	099267ffce	moved tlb to subdirectory	2023-02-26 17:31:03 -08:00
David Harris	a9e884acc8	Moved TLB into subdirectory of MMU	2023-02-26 17:28:05 -08:00
Ross Thompson	52faec7922	Merge pull request #116 from davidharrishmc/dev ... Removed unneeded TLBFlush from TLBMiss logic	2023-02-26 12:07:41 -06:00
David Harris	ab178d0956	Merge branch 'main' of https://github.com/openhwgroup/cvw into dev	2023-02-26 10:04:47 -08:00
David Harris	2ad62ea31f	Removed unneeded TLBFlush from TLBMiss	2023-02-26 10:04:16 -08:00
Ross Thompson	f411e63dc8	Merge pull request #115 from davidharrishmc/dev ... Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIME…	2023-02-26 12:02:54 -06:00
David Harris	2203c05724	Access faults are geted by ~TLBMiss rather than ~(Translate & ~TLBHit)	2023-02-26 09:58:34 -08:00
David Harris	4579a9d0c2	Renamed HPTW_WRITES_SUPPORTED to SVADU_SUPPORTED	2023-02-26 09:38:32 -08:00
David Harris	e3e5100f8d	Renamed DAPageFault to HPTWDAPageFault in hptw to avoid name conflict with DAPageFault from tlbcontrol	2023-02-26 07:12:43 -08:00
David Harris	d50658addf	Fixed missing assign when SSTC is not supported	2023-02-26 07:12:13 -08:00
David Harris	27acb90217	Fixed SSTC being unusable in M-MODE without Status.TM. Disable STIMECMP registers when SSTC_SUPPORTED = 0	2023-02-26 06:30:43 -08:00
Kevin Kim	c7050ada78	removed old shifter	2023-02-24 17:33:47 -08:00
Kevin Kim	9d119d1312	Merge pull request #1 from kipmacsaigoren/kkim_alu_new ... removed sign-extension muxes in shifter	2023-02-24 17:31:36 -08:00
Kevin Kim	b3180d7307	removed now-redundant zero-extend mux in alu	2023-02-24 17:14:12 -08:00
Kevin Kim	0fe1d3b9f3	took sign extension out of shifter	2023-02-24 17:09:56 -08:00
David Harris	db5aa5a0fd	Merge pull request #114 from ross144/main ... Fix the branch predictor's gshare and btb critical path issue	2023-02-24 16:55:34 -08:00
Ross Thompson	ea71fd09f5	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-02-24 18:50:35 -06:00
Ross Thompson	4058a49985	Possible fix to btb performance issue.	2023-02-24 18:36:41 -06:00
Ross Thompson	5c52827f51	Cleanup.	2023-02-24 18:20:42 -06:00
Ross Thompson	d030d323fd	Completed critical path gshare fix.	2023-02-24 18:02:00 -06:00