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setup so the sdc does not need to load a model in the imperas test bench.

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This commit is contained in:
Ross Thompson 2021-09-24 11:30:52 -05:00
parent c644e940c2
commit 9fdb1d3cc9
2 changed files with 4 additions and 2 deletions
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2
wally-pipelined/src/sdc/tb/sd_top_tb.sv
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@ -88,6 +88,8 @@ module sd_top_tb();
end end
initial $readmemh("ramdisk2.hex", sdcard.FLASHmem);
initial begin initial begin
a_RST = 1'b0; a_RST = 1'b0;

4
wally-pipelined/testbench/common/sdModel.sv
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@ -24,7 +24,7 @@ module sdModel
inout tri1 cmd, inout tri1 cmd,
inout tri1 [3:0] dat inout tri1 [3:0] dat
); );
parameter SD_FILE = "ramdisk2.hex"; //parameter SD_FILE = "ramdisk2.hex";
reg oeCmd; reg oeCmd;
reg oeDat; reg oeDat;
@ -142,7 +142,7 @@ module sdModel
reg q_start_bit; reg q_start_bit;
//Card initialization DAT contents //Card initialization DAT contents
initial $readmemh(SD_FILE, FLASHmem); //initial $readmemh(SD_FILE, FLASHmem);
initial begin initial begin
wide_data[0] <= 00; wide_data[0] <= 00;