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https://github.com/openhwgroup/cvw
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Updated Imperas test bench to work with the SDC reader.
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@ -516,25 +516,10 @@ add wave -noupdate -group UART /testbench/dut/uncore/uart/uart/HSELUART
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add wave -noupdate -group UART /testbench/dut/uncore/uart/uart/HADDR
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add wave -noupdate -group UART /testbench/dut/uncore/uart/uart/HWRITE
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add wave -noupdate -group UART /testbench/dut/uncore/uart/uart/HWDATA
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add wave -noupdate -color Gold /testbench/dut/hart/lsu/dcache/subwordread/offset0
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add wave -noupdate /testbench/dut/hart/lsu/dcache/subwordread/offset1
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add wave -noupdate /testbench/dut/hart/lsu/dcache/subwordread/offset2
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add wave -noupdate /testbench/dut/hart/lsu/dcache/subwordread/offset3
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add wave -noupdate /testbench/dut/hart/ExceptionM
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add wave -noupdate /testbench/dut/hart/PendingInterruptM
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add wave -noupdate /testbench/dut/hart/TrapM
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add wave -noupdate /testbench/dut/hart/ifu/icache/CompressedF
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add wave -noupdate /testbench/dut/hart/ifu/icache/PCPF
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add wave -noupdate /testbench/dut/hart/ifu/PCPFmmu
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add wave -noupdate /testbench/dut/hart/ifu/PCPF
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add wave -noupdate /testbench/dut/hart/ifu/PCF
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add wave -noupdate /testbench/dut/hart/ifu/immu/Translate
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add wave -noupdate /testbench/dut/hart/ifu/icache/FinalInstrRawF
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add wave -noupdate /testbench/dut/hart/ifu/icache/StallF
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add wave -noupdate /testbench/dut/hart/ifu/icache/ICacheMemReadData
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add wave -noupdate /testbench/dut/hart/ifu/icache/PCTagF
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add wave -noupdate /testbench/dut/hart/ifu/icache/PCPSpillF
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add wave -noupdate /testbench/dut/hart/ifu/icache/ICacheReadEn
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add wave -noupdate -expand -group SDC -color Gold /testbench/dut/uncore/sdc/SDC/CurrState
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add wave -noupdate -expand -group SDC /testbench/dut/uncore/sdc/SDC/HCLK
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add wave -noupdate -expand -group SDC /testbench/dut/uncore/sdc/SDC/CLKGate
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add wave -noupdate -expand -group SDC /testbench/dut/uncore/sdc/SDC/SDCCLK
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 6} {122378 ns} 0}
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quietly wave cursor active 1
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@ -552,4 +537,4 @@ configure wave -griddelta 40
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configure wave -timeline 0
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configure wave -timelineunits ns
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update
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WaveRestoreZoom {122227 ns} {122479 ns}
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WaveRestoreZoom {122134 ns} {122622 ns}
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@ -25,7 +25,7 @@
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`include "wally-config.vh"
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`define SDCCLKDIV 2
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`define SDCCLKDIV 8'd2
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module SDC
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(input logic HCLK,
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@ -6,7 +6,7 @@ if [file exists work] {
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}
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vlib work
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vlog +incdir+../../../config/rv64ic +incdir+../../../config/shared ../../../testbench/common/*.sv ../../*/*.sv sd_top_tb.sv sdModel.sv sd_crc_7.sv sd_crc_16.sv -suppress 2583
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vlog +incdir+../../../config/rv64ic +incdir+../../../config/shared ../../../testbench/common/*.sv ../../*/*.sv sd_top_tb.sv -suppress 2583
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vopt -fsmdebug +acc -gDEBUG=1 work.sd_top_tb -o workopt
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vsim workopt -fsmdebug
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@ -129,8 +129,10 @@ module uncore (
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// interrupt to PLIC
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.SDCIntM
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);
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end else begin : uart
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assign UARTSout = 0; assign UARTIntr = 0;
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end else begin : sdc
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assign SDCCLK = 0;
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assign SDCCmdOut = 0;
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assign SDCCmdOE = 0;
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end
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endgenerate
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@ -566,6 +566,10 @@ string tests32f[] = '{
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logic [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn;
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logic UARTSin, UARTSout;
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logic SDCCLK;
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tri1 SDCCmd;
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tri1 [3:0] SDCDat;
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// instantiate device to be tested
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assign GPIOPinsIn = 0;
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assign UARTSin = 1;
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@ -582,6 +586,14 @@ string tests32f[] = '{
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dut.hart.ifu.InstrM, dut.hart.ifu.InstrW,
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InstrFName, InstrDName, InstrEName, InstrMName, InstrWName);
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// SD card model
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sdModel sdcard
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(.sdClk(SDCCLK),
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.cmd(SDCCmd),
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.dat(SDCDat));
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// initialize tests
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localparam integer MemStartAddr = `TIM_BASE>>(1+`XLEN/32);
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localparam integer MemEndAddr = (`TIM_RANGE+`TIM_BASE)>>1+(`XLEN/32);
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