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Update busybear tests to conform to new directory structure

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This commit is contained in:
Noah Boorstin 2021-01-25 20:37:18 -05:00
parent 09c92a6b5d
commit 91dcffa26f
3 changed files with 9 additions and 6 deletions
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3
wally-pipelined/config/busybear/wally-config.vh
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@ -54,6 +54,9 @@
`define MEM_ICACHE 0 `define MEM_ICACHE 0
`define MEM_VIRTMEM 0 `define MEM_VIRTMEM 0
// Address space
`define RESET_VECTOR 64'h0000000000001000
// Test modes // Test modes
// Tie GPIO outputs back to inputs // Tie GPIO outputs back to inputs

2
wally-pipelined/regression/wally-busybear.do
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@ -26,7 +26,7 @@ vlib work
# suppress spurious warnngs about # suppress spurious warnngs about
# "Extra checking for conflicts with always_comb done at vopt time" # "Extra checking for conflicts with always_comb done at vopt time"
# because vsim will run vopt # because vsim will run vopt
vlog src/*.sv -suppress 2583 vlog +incdir+../config/busybear ../testbench/*.sv ../src/*.sv -suppress 2583
# start and run simulation # start and run simulation
# remove +acc flag for faster sim during regressions if there is no need to access internal signals # remove +acc flag for faster sim during regressions if there is no need to access internal signals

10
wally-pipelined/testbench/testbench-busybear.sv
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@ -21,7 +21,7 @@ module testbench_busybear();
assign DataAccessFaultM = 0; assign DataAccessFaultM = 0;
// instantiate processor and memories // instantiate processor and memories
wallypipelinedhart #(.PCSTART('h1000)) dut(.ALUResultM(DataAdrM), .*); wallypipelinedhart dut(.ALUResultM(DataAdrM), .*);
// initialize test // initialize test
initial initial
@ -32,7 +32,7 @@ module testbench_busybear();
// read pc trace file // read pc trace file
integer data_file_PC, scan_file_PC; integer data_file_PC, scan_file_PC;
initial begin initial begin
data_file_PC = $fopen("busybear-testgen/parsedPC.txt", "r"); data_file_PC = $fopen("../busybear-testgen/parsedPC.txt", "r");
if (data_file_PC == 0) begin if (data_file_PC == 0) begin
$display("file couldn't be opened"); $display("file couldn't be opened");
$stop; $stop;
@ -42,7 +42,7 @@ module testbench_busybear();
// read register trace file // read register trace file
integer data_file_rf, scan_file_rf; integer data_file_rf, scan_file_rf;
initial begin initial begin
data_file_rf = $fopen("busybear-testgen/parsedRegs.txt", "r"); data_file_rf = $fopen("../busybear-testgen/parsedRegs.txt", "r");
if (data_file_rf == 0) begin if (data_file_rf == 0) begin
$display("file couldn't be opened"); $display("file couldn't be opened");
$stop; $stop;
@ -52,7 +52,7 @@ module testbench_busybear();
// read memreads trace file // read memreads trace file
integer data_file_memR, scan_file_memR; integer data_file_memR, scan_file_memR;
initial begin initial begin
data_file_memR = $fopen("busybear-testgen/parsedMemRead.txt", "r"); data_file_memR = $fopen("../busybear-testgen/parsedMemRead.txt", "r");
if (data_file_memR == 0) begin if (data_file_memR == 0) begin
$display("file couldn't be opened"); $display("file couldn't be opened");
$stop; $stop;
@ -62,7 +62,7 @@ module testbench_busybear();
// read memwrite trace file // read memwrite trace file
integer data_file_memW, scan_file_memW; integer data_file_memW, scan_file_memW;
initial begin initial begin
data_file_memW = $fopen("busybear-testgen/parsedMemWrite.txt", "r"); data_file_memW = $fopen("../busybear-testgen/parsedMemWrite.txt", "r");
if (data_file_memW == 0) begin if (data_file_memW == 0) begin
$display("file couldn't be opened"); $display("file couldn't be opened");
$stop; $stop;