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fixed initial value, timing on fs bits changing after floating point instruction

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Kip Macsai-Goren 2022-04-25 19:17:29 +00:00
parent 7e6fefb2d9
commit 8ad920fcb3
1 changed files with 2 additions and 2 deletions
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pipelined/src/privileged/csrsr.sv
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@ -111,7 +111,7 @@ module csrsr (
STATUS_MXR_INT <= #1 0;
STATUS_SUM_INT <= #1 0;
STATUS_MPRV_INT <= #1 0; // Per Priv 3.3
STATUS_FS_INT <= #1 0;
STATUS_FS_INT <= #1 `F_SUPPORTED ? 2'b01 : 2'b00;
STATUS_MPP <= #1 0; //`M_MODE;
STATUS_SPP <= #1 0; //1'b1;
STATUS_MPIE <= #1 0; //1;