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Simplified out LOGRK parameter

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This commit is contained in:
David Harris 2023-11-10 18:19:41 -08:00
parent 7d0d9dcebe
commit 3cae2385ab
4 changed files with 4 additions and 8 deletions
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5
config/shared/config-shared.vh
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@ -97,11 +97,10 @@ localparam BIAS2 = ((F_SUPPORTED & (LEN1 != S_LEN)) ? S_BIAS : H_BIAS);
localparam DIVN = ((NF+2<XLEN) & IDIV_ON_FPU) ? XLEN : NF+2; // standard length of input: max(XLEN, NF+2) localparam DIVN = ((NF+2<XLEN) & IDIV_ON_FPU) ? XLEN : NF+2; // standard length of input: max(XLEN, NF+2)
localparam LOGR = $clog2(RADIX); // r = log(R) localparam LOGR = $clog2(RADIX); // r = log(R)
localparam RK = LOGR*DIVCOPIES; // r*k bits per cycle generated localparam RK = LOGR*DIVCOPIES; // r*k bits per cycle generated
localparam LOGRK = $clog2(RK); // log2(r*k) localparam FPDUR = (DIVN+1)/RK + 1 + (RADIX/4); // *** relate to algorithm for rest of these
localparam FPDUR = (DIVN+1)/RK + 1 + (RADIX/4); //
localparam DURLEN = $clog2(FPDUR+1); localparam DURLEN = $clog2(FPDUR+1);
localparam DIVb = FPDUR*RK - 1; // canonical fdiv size (b) localparam DIVb = FPDUR*RK - 1; // canonical fdiv size (b)
localparam DIVBLEN = $clog2(DIVb+2)-1; localparam DIVBLEN = $clog2(DIVb+2)-1; // *** where is 2 coming from?
// largest length in IEU/FPU // largest length in IEU/FPU
localparam CVTLEN = ((NF<XLEN) ? (XLEN) : (NF)); // max(XLEN, NF) localparam CVTLEN = ((NF<XLEN) ? (XLEN) : (NF)); // max(XLEN, NF)

1
config/shared/parameter-defs.vh
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@ -180,7 +180,6 @@ localparam cvw_t P = '{
DIVN : DIVN, DIVN : DIVN,
LOGR : LOGR, LOGR : LOGR,
RK : RK, RK : RK,
LOGRK : LOGRK,
FPDUR : FPDUR, FPDUR : FPDUR,
DURLEN : DURLEN, DURLEN : DURLEN,
DIVb : DIVb, DIVb : DIVb,

1
src/cvw.sv
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@ -272,7 +272,6 @@ typedef struct packed {
int DIVN ; int DIVN ;
int LOGR ; int LOGR ;
int RK ; int RK ;
int LOGRK ;
int FPDUR ; int FPDUR ;
int DURLEN ; int DURLEN ;
int DIVb ; int DIVb ;

5
src/fpu/fdivsqrt/fdivsqrtpreproc.sv
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@ -133,9 +133,8 @@ module fdivsqrtpreproc import cvw::*; #(parameter cvw_t P) (
assign ISpecialCaseE = BZeroE | ALTBE; assign ISpecialCaseE = BZeroE | ALTBE;
// calculate right shift amount RightShiftX to complete in discrete number of steps // calculate right shift amount RightShiftX to complete in discrete number of steps
if (P.LOGRK > 0) begin // more than 1 bit per cycle if (P.RK > 1) begin // more than 1 bit per cycle
logic [P.LOGRK-1:0] IntTrunc, RightShiftX; logic [$clog2(P.RK)-1:0] RightShiftX;
logic [P.DIVBLEN:0] IntSteps;
/* verilator lint_offf WIDTH */ /* verilator lint_offf WIDTH */
assign RightShiftX = P.RK - 1 - ((IntResultBitsE - 1) % P.RK); // Right shift amount assign RightShiftX = P.RK - 1 - ((IntResultBitsE - 1) % P.RK); // Right shift amount
assign DivXShifted = DivX >> RightShiftX; // shift X by up to R*K-1 to complete in n steps assign DivXShifted = DivX >> RightShiftX; // shift X by up to R*K-1 to complete in n steps