cvw/benchmarks
Ross Thompson 9ddd065340 Updated coremark testbench with the extra ports from FPGA merge.
Fixed coremark Makefile to create work directory.
2021-12-08 13:40:32 -06:00
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riscv-coremark Updated coremark testbench with the extra ports from FPGA merge. 2021-12-08 13:40:32 -06:00