forked from Github_Repos/cvw
745 lines
37 KiB
Systemverilog
745 lines
37 KiB
Systemverilog
///////////////////////////////////////////
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//
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// Written: Katherine Parry, David Harris
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// Modified: 6/23/2021
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//
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// Purpose: Floating point multiply-accumulate of configurable size
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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// `include "../../../config/rv64icfd/wally-config.vh"
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module fma(
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input logic clk,
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input logic reset,
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input logic FlushM, // flush the memory stage
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input logic StallM, // stall memory stage
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input logic FmtE, FmtM, // precision 1 = double 0 = single
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input logic [2:0] FOpCtrlE, // 000 = fmadd (X*Y)+Z, 001 = fmsub (X*Y)-Z, 010 = fnmsub -(X*Y)+Z, 011 = fnmadd -(X*Y)-Z, 100 = fmul (X*Y)
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input logic [2:0] FrmM, // rounding mode 000 = rount to nearest, ties to even 001 = round twords zero 010 = round down 011 = round up 100 = round to nearest, ties to max magnitude
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input logic XSgnE, YSgnE, ZSgnE, // input signs - execute stage
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input logic [`NE-1:0] XExpE, YExpE, ZExpE, // input exponents - execute stage
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input logic [`NF:0] XManE, YManE, ZManE, // input mantissa - execute stage
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input logic XSgnM, YSgnM, // input signs - memory stage
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input logic [`NE-1:0] XExpM, YExpM, ZExpM, // input exponents - memory stage
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input logic [`NF:0] XManM, YManM, ZManM, // input mantissa - memory stage
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input logic XDenormE, YDenormE, ZDenormE, // is denorm
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input logic XZeroE, YZeroE, ZZeroE, // is zero - execute stage
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input logic XNaNM, YNaNM, ZNaNM, // is NaN
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input logic XSNaNM, YSNaNM, ZSNaNM, // is signaling NaN
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input logic XZeroM, YZeroM, ZZeroM, // is zero - memory stage
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input logic XInfM, YInfM, ZInfM, // is infinity
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input logic [10:0] BiasE, // bias (max exponent/2) ***parameterize in unpacking unit
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output logic [`FLEN-1:0] FMAResM, // FMA result
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output logic [4:0] FMAFlgM); // FMA flags
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//fma/mult/add
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// fmadd = 000
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// fmsub = 001
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// fnmsub = 010 -(a*b)+c
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// fnmadd = 011 -(a*b)-c
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// fmul = 100
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// fadd = 110
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// fsub = 111
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// signals transfered between pipeline stages
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logic [3*`NF+5:0] SumE, SumM;
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logic [`NE+1:0] ProdExpE, ProdExpM;
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logic AddendStickyE, AddendStickyM;
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logic KillProdE, KillProdM;
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logic InvZE, InvZM;
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logic NegSumE, NegSumM;
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logic ZSgnEffE, ZSgnEffM;
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logic PSgnE, PSgnM;
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logic [8:0] NormCntE, NormCntM;
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fma1 fma1 (.XSgnE, .YSgnE, .ZSgnE, .XExpE, .YExpE, .ZExpE, .XManE, .YManE, .ZManE,
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.BiasE, .XDenormE, .YDenormE, .ZDenormE, .XZeroE, .YZeroE, .ZZeroE,
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.FOpCtrlE, .FmtE, .SumE, .NegSumE, .InvZE, .NormCntE, .ZSgnEffE, .PSgnE,
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.ProdExpE, .AddendStickyE, .KillProdE);
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// E/M pipeline registers
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flopenrc #(3*`NF+6) EMRegFma2(clk, reset, FlushM, ~StallM, SumE, SumM);
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flopenrc #(13) EMRegFma3(clk, reset, FlushM, ~StallM, ProdExpE, ProdExpM);
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flopenrc #(15) EMRegFma4(clk, reset, FlushM, ~StallM,
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{AddendStickyE, KillProdE, InvZE, NormCntE, NegSumE, ZSgnEffE, PSgnE},
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{AddendStickyM, KillProdM, InvZM, NormCntM, NegSumM, ZSgnEffM, PSgnM});
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fma2 fma2(.XSgnM, .YSgnM, .XExpM, .YExpM, .ZExpM, .XManM, .YManM, .ZManM,
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.FrmM, .FmtM, .ProdExpM, .AddendStickyM, .KillProdM, .SumM, .NegSumM, .InvZM, .NormCntM, .ZSgnEffM, .PSgnM,
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.XZeroM, .YZeroM, .ZZeroM, .XInfM, .YInfM, .ZInfM, .XNaNM, .YNaNM, .ZNaNM, .XSNaNM, .YSNaNM, .ZSNaNM,
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.FMAResM, .FMAFlgM);
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endmodule
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module fma1(
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input logic XSgnE, YSgnE, ZSgnE, // input's signs
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input logic [`NE-1:0] XExpE, YExpE, ZExpE, // biased exponents in B(NE.0) format
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input logic [`NF:0] XManE, YManE, ZManE, // fractions in U(0.NF) format
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input logic XDenormE, YDenormE, ZDenormE, // is the input denormal
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input logic XZeroE, YZeroE, ZZeroE, // is the input zero
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input logic [`NE-1:0] BiasE, // bias (max exponent/2)
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input logic [2:0] FOpCtrlE, // 000 = fmadd (X*Y)+Z, 001 = fmsub (X*Y)-Z, 010 = fnmsub -(X*Y)+Z, 011 = fnmadd -(X*Y)-Z, 100 = fmul (X*Y)
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input logic FmtE, // precision 1 = double 0 = single
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output logic [`NE+1:0] ProdExpE, // X exponent + Y exponent - bias in B(NE+2.0) format; adds 2 bits to allow for size of number and negative sign
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output logic AddendStickyE, // sticky bit that is calculated during alignment
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output logic KillProdE, // set the product to zero before addition if the product is too small to matter
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output logic [3*`NF+5:0] SumE, // the positive sum
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output logic NegSumE, // was the sum negitive
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output logic InvZE, // intert Z
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output logic ZSgnEffE, // the modified Z sign
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output logic PSgnE, // the product's sign
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output logic [8:0] NormCntE // normalization shift cnt
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);
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logic [`NE-1:0] Denorm; // value of a denormaized number based on precision
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logic [`NE-1:0] XExpVal, YExpVal; // Exponent value after taking into account denormals
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logic [2*`NF+1:0] ProdManE; // 1.X frac * 1.Y frac in U(2.2Nf) format
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logic [3*`NF+5:0] AlignedAddendE; // Z aligned for addition in U(NF+5.2NF+1)
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///////////////////////////////////////////////////////////////////////////////
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// Calculate the product
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// - When multipliying two fp numbers, add the exponents
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// - Subtract the bias (XExp + YExp has two biases, one from each exponent)
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// - If the product is zero then kill the exponent - this is a problem
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///////////////////////////////////////////////////////////////////////////////
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// denormalized numbers have diffrent values depending on which precison it is.
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// double - 1
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// single - 1024-128+1 = 897
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assign Denorm = FmtE ? 1 : 897;
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assign XExpVal = XDenormE ? Denorm : XExpE;
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assign YExpVal = YDenormE ? Denorm : YExpE;
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// take into account if the product is zero, the product's exponent does not compute properly if X or Y is zero
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assign ProdExpE = (XExpVal + YExpVal - BiasE)&{`NE+2{~(XZeroE|YZeroE)}};
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// multiplication of the mantissa's
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mult mult(.XManE, .YManE, .ProdManE);
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///////////////////////////////////////////////////////////////////////////////
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// Alignment shifter
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///////////////////////////////////////////////////////////////////////////////
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alignshift alignshift(.ZExpE, .ZManE, .ZDenormE, .XZeroE, .YZeroE, .ZZeroE, .ProdExpE, .Denorm,
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.AlignedAddendE, .AddendStickyE, .KillProdE);
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// Calculate the product's sign
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// Negate product's sign if FNMADD or FNMSUB
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assign PSgnE = XSgnE ^ YSgnE ^ (FOpCtrlE[1]&~FOpCtrlE[2]);
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assign ZSgnEffE = ZSgnE^FOpCtrlE[0]; // Swap sign of Z for subtract
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// ///////////////////////////////////////////////////////////////////////////////
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// // Addition/LZA
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// ///////////////////////////////////////////////////////////////////////////////
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fmaadd fmaadd(.AlignedAddendE, .ProdManE, .PSgnE, .ZSgnEffE, .KillProdE, .SumE, .NegSumE, .InvZE, .NormCntE, .XZeroE, .YZeroE);
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endmodule
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module fma2(
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input logic XSgnM, YSgnM, // input signs
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input logic [`NE-1:0] XExpM, YExpM, ZExpM, // input exponents
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input logic [`NF:0] XManM, YManM, ZManM, // input mantissas
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input logic [2:0] FrmM, // rounding mode 000 = rount to nearest, ties to even 001 = round twords zero 010 = round down 011 = round up 100 = round to nearest, ties to max magnitude
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input logic FmtM, // precision 1 = double 0 = single
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input logic [`NE+1:0] ProdExpM, // X exponent + Y exponent - bias
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input logic AddendStickyM, // sticky bit that is calculated during alignment
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input logic KillProdM, // set the product to zero before addition if the product is too small to matter
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input logic XZeroM, YZeroM, ZZeroM, // inputs are zero
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input logic XInfM, YInfM, ZInfM, // inputs are infinity
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input logic XNaNM, YNaNM, ZNaNM, // inputs are NaN
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input logic XSNaNM, YSNaNM, ZSNaNM, // inputs are signaling NaNs
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input logic [3*`NF+5:0] SumM, // the positive sum
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input logic NegSumM, // was the sum negitive
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input logic InvZM, // do you invert Z
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input logic ZSgnEffM, // the modified Z sign - depends on instruction
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input logic PSgnM, // the product's sign
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input logic [8:0] NormCntM, // the normalization shift count
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output logic [`FLEN-1:0] FMAResM, // FMA final result
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output logic [4:0] FMAFlgM); // FMA flags {invalid, divide by zero, overflow, underflow, inexact}
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logic [`NF-1:0] ResultFrac; // Result fraction
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logic [`NE-1:0] ResultExp; // Result exponent
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logic ResultSgn; // Result sign
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logic [`NE+1:0] SumExp; // exponent of the normalized sum
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logic [`NE+1:0] FullResultExp; // ResultExp with bits to determine sign and overflow
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logic [`NF+2:0] NormSum; // normalized sum
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logic NormSumSticky; // sticky bit calulated from the normalized sum
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logic SumZero; // is the sum zero
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logic ResultDenorm; // is the result denormalized
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logic Sticky, UfSticky; // Sticky bit
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logic Plus1, Minus1, CalcPlus1; // do you add or subtract one for rounding
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logic UfPlus1; // do you add one (for determining underflow flag)
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logic Invalid,Underflow,Overflow; // flags
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logic ZeroSgn; // the result's sign if the sum is zero
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logic ResultSgnTmp; // the result's sign assuming the result is not zero
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logic Guard, Round; // bits needed to determine rounding
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logic UfRound, UfLSBNormSum; // bits needed to determine rounding for underflow flag
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logic [`FLEN-1:0] XNaNResult, YNaNResult, ZNaNResult, InvalidResult, OverflowResult, KillProdResult, UnderflowResult; // possible results
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///////////////////////////////////////////////////////////////////////////////
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// Normalization
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///////////////////////////////////////////////////////////////////////////////
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normalize normalize(.SumM, .ZExpM, .ProdExpM, .NormCntM, .FmtM, .KillProdM, .AddendStickyM, .NormSum,
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.SumZero, .NormSumSticky, .UfSticky, .SumExp, .ResultDenorm);
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///////////////////////////////////////////////////////////////////////////////
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// Rounding
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///////////////////////////////////////////////////////////////////////////////
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// round to nearest even
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// round to zero
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// round to -infinity
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// round to infinity
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// round to nearest max magnitude
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fmaround fmaround(.FmtM, .FrmM, .Sticky, .UfSticky, .NormSum, .AddendStickyM, .NormSumSticky, .ZZeroM, .InvZM, .ResultSgn, .SumExp,
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.CalcPlus1, .Plus1, .UfPlus1, .Minus1, .FullResultExp, .ResultFrac, .ResultExp, .Round, .Guard, .UfRound, .UfLSBNormSum);
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///////////////////////////////////////////////////////////////////////////////
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// Sign calculation
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///////////////////////////////////////////////////////////////////////////////
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// Determine the sign if the sum is zero
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// if cancelation then 0 unless round to -infinity
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// otherwise psign
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assign ZeroSgn = (PSgnM^ZSgnEffM)&~Underflow ? FrmM[1:0] == 2'b10 : PSgnM;
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// is the result negitive
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// if p - z is the Sum negitive
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// if -p + z is the Sum positive
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// if -p - z then the Sum is negitive
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assign ResultSgnTmp = InvZM&(ZSgnEffM)&NegSumM | InvZM&PSgnM&~NegSumM | ((ZSgnEffM)&PSgnM);
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assign ResultSgn = SumZero ? ZeroSgn : ResultSgnTmp;
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///////////////////////////////////////////////////////////////////////////////
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// Flags
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///////////////////////////////////////////////////////////////////////////////
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fmaflags fmaflags(.XSNaNM, .YSNaNM, .ZSNaNM, .XInfM, .YInfM, .ZInfM, .XZeroM, .YZeroM,
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.XNaNM, .YNaNM, .ZNaNM, .FullResultExp, .SumExp, .ZSgnEffM, .PSgnM, .Round, .Guard, .UfRound, .UfLSBNormSum, .Sticky, .UfPlus1,
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.FmtM, .Invalid, .Overflow, .Underflow, .FMAFlgM);
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///////////////////////////////////////////////////////////////////////////////
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// Select the result
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///////////////////////////////////////////////////////////////////////////////
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assign XNaNResult = FmtM ? {XSgnM, XExpM, 1'b1, XManM[`NF-2:0]} : {{32{1'b1}}, XSgnM, XExpM[7:0], 1'b1, XManM[50:29]};
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assign YNaNResult = FmtM ? {YSgnM, YExpM, 1'b1, YManM[`NF-2:0]} : {{32{1'b1}}, YSgnM, YExpM[7:0], 1'b1, YManM[50:29]};
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assign ZNaNResult = FmtM ? {ZSgnEffM, ZExpM, 1'b1, ZManM[`NF-2:0]} : {{32{1'b1}}, ZSgnEffM, ZExpM[7:0], 1'b1, ZManM[50:29]};
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assign OverflowResult = FmtM ? ((FrmM[1:0]==2'b01) | (FrmM[1:0]==2'b10&~ResultSgn) | (FrmM[1:0]==2'b11&ResultSgn)) ? {ResultSgn, {`NE-1{1'b1}}, 1'b0, {`NF{1'b1}}} :
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{ResultSgn, {`NE{1'b1}}, {`NF{1'b0}}} :
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((FrmM[1:0]==2'b01) | (FrmM[1:0]==2'b10&~ResultSgn) | (FrmM[1:0]==2'b11&ResultSgn)) ? {{32{1'b1}}, ResultSgn, 8'hfe, {23{1'b1}}} :
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{{32{1'b1}}, ResultSgn, 8'hff, 23'b0};
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assign InvalidResult = FmtM ? {ResultSgn, {`NE{1'b1}}, 1'b1, {`NF-1{1'b0}}} : {{32{1'b1}}, ResultSgn, 8'hff, 1'b1, 22'b0};
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assign KillProdResult = FmtM ? {ResultSgn, {ZExpM, ZManM[`NF-1:0]} - (Minus1&AddendStickyM) + (Plus1&AddendStickyM)} : {{32{1'b1}}, ResultSgn, {ZExpM[`NE-1],ZExpM[6:0], ZManM[51:29]} - {30'b0, (Minus1&AddendStickyM)} + {30'b0, (Plus1&AddendStickyM)}};
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assign UnderflowResult = FmtM ? {ResultSgn, {`FLEN-1{1'b0}}} + (CalcPlus1&(AddendStickyM|FrmM[1])) : {{32{1'b1}}, {ResultSgn, 31'b0} + {31'b0, (CalcPlus1&(AddendStickyM|FrmM[1]))}};
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assign FMAResM = XNaNM ? XNaNResult :
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YNaNM ? YNaNResult :
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ZNaNM ? ZNaNResult :
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Invalid ? InvalidResult :
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XInfM ? FmtM ? {PSgnM, XExpM, XManM[`NF-1:0]} : {{32{1'b1}}, PSgnM, XExpM[7:0], XManM[51:29]} :
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YInfM ? FmtM ? {PSgnM, YExpM, YManM[`NF-1:0]} : {{32{1'b1}}, PSgnM, YExpM[7:0], YManM[51:29]} :
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ZInfM ? FmtM ? {ZSgnEffM, ZExpM, ZManM[`NF-1:0]} : {{32{1'b1}}, ZSgnEffM, ZExpM[7:0], ZManM[51:29]} :
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KillProdM ? KillProdResult :
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Overflow ? OverflowResult :
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Underflow & ~ResultDenorm & (ResultExp!=1) ? UnderflowResult :
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FmtM ? {ResultSgn, ResultExp, ResultFrac} :
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{{32{1'b1}}, ResultSgn, ResultExp[7:0], ResultFrac[51:29]};
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// *** use NF where needed
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endmodule
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module mult(
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input logic [`NF:0] XManE, YManE,
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output logic [2*`NF+1:0] ProdManE
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);
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assign ProdManE = XManE * YManE;
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endmodule
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module alignshift(
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input logic [`NE-1:0] ZExpE, // biased exponents in B(NE.0) format
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input logic [`NF:0] ZManE, // fractions in U(0.NF) format]
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input logic ZDenormE, // is the input denormal
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input logic XZeroE, YZeroE, ZZeroE, // is the input zero
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input logic [`NE+1:0] ProdExpE, // the product's exponent
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input logic [`NE-1:0] Denorm, // the biased value of a denormalized number
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output logic [3*`NF+5:0] AlignedAddendE, // Z aligned for addition in U(NF+5.2NF+1)
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output logic AddendStickyE, // Sticky bit calculated from the aliged addend
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output logic KillProdE // should the product be set to zero
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);
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logic [`NE+1:0] AlignCnt; // how far to shift the addend to align with the product in Q(NE+2.0) format
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logic [4*`NF+5:0] ZManShifted; // output of the alignment shifter including sticky bits U(NF+5.3NF+1)
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logic [4*`NF+5:0] ZManPreShifted; // input to the alignment shifter U(NF+5.3NF+1)
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logic [`NE-1:0] ZExpVal; // Exponent value after taking into account denormals
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///////////////////////////////////////////////////////////////////////////////
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// Alignment shifter
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///////////////////////////////////////////////////////////////////////////////
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// determine the shift count for alignment
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// - negitive means Z is larger, so shift Z left
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// - positive means the product is larger, so shift Z right
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// - Denormal numbers have a diffrent exponent value depending on the precision
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assign ZExpVal = ZDenormE ? Denorm : ZExpE;
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assign AlignCnt = ProdExpE - ZExpVal + (`NF+3);
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// Defualt Addition without shifting
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// | 54'b0 | 106'b(product) | 2'b0 |
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// | addnend |
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// the 1'b0 before the added is because the product's mantissa has two bits before the binary point (xx.xxxxxxxxxx...)
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assign ZManPreShifted = {ZManE,(3*`NF+5)'(0)};
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always_comb
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begin
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// If the product is too small to effect the sum, kill the product
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// | 54'b0 | 106'b(product) | 2'b0 |
|
|
// | addnend |
|
|
if ($signed(AlignCnt) < $signed(0)) begin
|
|
KillProdE = 1;
|
|
ZManShifted = ZManPreShifted;
|
|
AddendStickyE = ~(XZeroE|YZeroE);
|
|
|
|
// If the Addend is shifted right
|
|
// | 54'b0 | 106'b(product) | 2'b0 |
|
|
// | addnend |
|
|
end else if ($signed(AlignCnt)<=$signed(3*`NF+4)) begin
|
|
KillProdE = 0;
|
|
ZManShifted = ZManPreShifted >> AlignCnt;
|
|
AddendStickyE = |(ZManShifted[`NF-1:0]);
|
|
|
|
// If the addend is too small to effect the addition
|
|
// - The addend has to shift two past the end of the addend to be considered too small
|
|
// - The 2 extra bits are needed for rounding
|
|
|
|
// | 54'b0 | 106'b(product) | 2'b0 |
|
|
// | addnend |
|
|
end else begin
|
|
KillProdE = 0;
|
|
ZManShifted = 0;
|
|
AddendStickyE = ~ZZeroE;
|
|
|
|
end
|
|
end
|
|
|
|
assign AlignedAddendE = ZManShifted[4*`NF+5:`NF];
|
|
|
|
endmodule
|
|
|
|
module fmaadd(
|
|
input logic [3*`NF+5:0] AlignedAddendE, // Z aligned for addition in U(NF+5.2NF+1)
|
|
input logic [2*`NF+1:0] ProdManE, // the product's mantissa
|
|
input logic PSgnE, ZSgnEffE,// the product and modified Z signs
|
|
input logic KillProdE, // should the product be set to 0
|
|
input logic XZeroE, YZeroE, // is the input zero
|
|
output logic [3*`NF+5:0] SumE, // the positive sum
|
|
output logic NegSumE, // was the sum negitive
|
|
output logic InvZE, // do you invert Z
|
|
output logic [8:0] NormCntE // normalization shift count
|
|
);
|
|
logic [3*`NF+6:0] PreSum, NegPreSum; // possibly negitive sum
|
|
logic [2*`NF+1:0] ProdMan2; // product being added
|
|
logic [3*`NF+6:0] AlignedAddend2; // possibly inverted aligned Z
|
|
logic [3*`NF+6:0] NegProdMan2; // a negated ProdMan2
|
|
logic [8:0] PNormCnt, NNormCnt; // results from the LZA
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// Addition
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
|
|
// Negate Z when doing one of the following opperations:
|
|
// -prod + Z
|
|
// prod - Z
|
|
assign InvZE = ZSgnEffE ^ PSgnE;
|
|
|
|
// Choose an inverted or non-inverted addend - the one has to be added now for the LZA
|
|
assign AlignedAddend2 = InvZE ? -{1'b0, AlignedAddendE} : {1'b0, AlignedAddendE};
|
|
// Kill the product if the product is too small to effect the addition (determined in fma1.sv)
|
|
assign ProdMan2 = ProdManE&{2*`NF+2{~KillProdE}};
|
|
// Negate ProdMan for LZA and the negitive sum calculation
|
|
assign NegProdMan2 = {{`NF+3{~(XZeroE|YZeroE|KillProdE)}}, -ProdMan2, 2'b0};
|
|
|
|
// LZAs one for the positive result and one for the negitive
|
|
// - the +1 from inverting causes problems for normalization
|
|
poslza poslza(AlignedAddend2, ProdMan2, PNormCnt);
|
|
neglza neglza({1'b0,AlignedAddendE}, NegProdMan2, NNormCnt);
|
|
|
|
|
|
// Do the addition
|
|
// - calculate a positive and negitive sum in parallel
|
|
assign PreSum = AlignedAddend2 + {ProdMan2, 2'b0};
|
|
assign NegPreSum = AlignedAddendE + NegProdMan2;
|
|
|
|
// Is the sum negitive
|
|
assign NegSumE = PreSum[3*`NF+6];
|
|
// Choose the positive sum and accompanying LZA result.
|
|
assign SumE = NegSumE ? NegPreSum[3*`NF+5:0] : PreSum[3*`NF+5:0];
|
|
assign NormCntE = NegSumE ? NNormCnt : PNormCnt;
|
|
|
|
endmodule
|
|
|
|
|
|
|
|
|
|
|
|
module poslza(
|
|
input logic [3*`NF+6:0] A, // addend
|
|
input logic [2*`NF+1:0] P, // product
|
|
output logic [8:0] PCnt // normalization shift count for the positive result
|
|
);
|
|
|
|
|
|
// calculate the propagate (T) and kill (Z) bits
|
|
logic [3*`NF+6:0] T;
|
|
logic [3*`NF+5:0] Z;
|
|
assign T[3*`NF+6:2*`NF+4] = A[3*`NF+6:2*`NF+4];
|
|
assign Z[3*`NF+5:2*`NF+4] = A[3*`NF+5:2*`NF+4];
|
|
assign T[2*`NF+3:2] = A[2*`NF+3:2]^P;
|
|
assign Z[2*`NF+3:2] = A[2*`NF+3:2]|P;
|
|
assign T[1:0] = A[1:0];
|
|
assign Z[1:0] = A[1:0];
|
|
|
|
|
|
// Apply function to determine Leading pattern
|
|
logic [3*`NF+6:0] pf;
|
|
assign pf = T^{Z[3*`NF+5:0], 1'b0};
|
|
|
|
logic [8:0] i;
|
|
always_comb begin
|
|
i = 0;
|
|
while (~pf[3*`NF+6-i] && $unsigned(i) <= $unsigned(3*`NF+6)) i = i+1; // search for leading one
|
|
PCnt = i;
|
|
end
|
|
|
|
endmodule
|
|
|
|
module neglza(
|
|
input logic [3*`NF+6:0] A, // addend
|
|
input logic [3*`NF+6:0] P, // product
|
|
output logic [8:0] NCnt // normalization shift count for the negitive result
|
|
);
|
|
|
|
// calculate the propagate (T) and kill (Z) bits
|
|
logic [3*`NF+6:0] T;
|
|
logic [3*`NF+5:0] Z;
|
|
assign T = A^P;
|
|
assign Z = ~(A[3*`NF+5:0]|P[3*`NF+5:0]);
|
|
|
|
|
|
// Apply function to determine Leading pattern
|
|
logic [3*`NF+6:0] f;
|
|
assign f = T^{~Z, 1'b0};
|
|
|
|
logic [8:0] i;
|
|
always_comb begin
|
|
i = 0;
|
|
while (~f[3*`NF+6-i] && $unsigned(i) <= $unsigned(3*`NF+6)) i = i+1; // search for leading one
|
|
NCnt = i;
|
|
end
|
|
|
|
endmodule
|
|
|
|
|
|
|
|
module normalize(
|
|
input logic [3*`NF+5:0] SumM, // the positive sum
|
|
input logic [`NE-1:0] ZExpM, // exponent of Z
|
|
input logic [`NE+1:0] ProdExpM, // X exponent + Y exponent - bias
|
|
input logic [8:0] NormCntM, // normalization shift count
|
|
input logic FmtM, // precision 1 = double 0 = single
|
|
input logic KillProdM, // is the product set to zero
|
|
input logic AddendStickyM, // the sticky bit caclulated from the aligned addend
|
|
output logic [`NF+2:0] NormSum, // normalized sum
|
|
output logic SumZero, // is the sum zero
|
|
output logic NormSumSticky, UfSticky, // sticky bits
|
|
output logic [`NE+1:0] SumExp, // exponent of the normalized sum
|
|
output logic ResultDenorm // is the result denormalized
|
|
);
|
|
logic [`NE+1:0] FracLen; // length of the fraction
|
|
logic [`NE+1:0] SumExpTmp; // exponent of the normalized sum not taking into account denormal or zero results
|
|
logic [8:0] DenormShift; // right shift if the result is denormalized //***change this later
|
|
logic [3*`NF+5:0] CorrSumShifted; // the shifted sum after LZA correction
|
|
logic [3*`NF+7:0] SumShifted; // the shifted sum before LZA correction
|
|
logic [`NE+1:0] SumExpTmpTmp; // the exponent of the normalized sum with the `FLEN bias
|
|
logic PreResultDenorm; // is the result denormalized - calculated before LZA corection
|
|
logic LZAPlus1; // add one to the sum's exponent due to LZA correction
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// Normalization
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
|
|
// Determine if the sum is zero
|
|
assign SumZero = ~(|SumM);
|
|
|
|
// determine the length of the fraction based on precision
|
|
assign FracLen = FmtM ? `NF+1 : 13'd24;
|
|
|
|
// calculate the sum's exponent
|
|
assign SumExpTmpTmp = KillProdM ? {2'b0, ZExpM} : ProdExpM + -({4'b0, NormCntM} + 1 - (`NF+4));
|
|
assign SumExpTmp = FmtM ? SumExpTmpTmp : (SumExpTmpTmp-1023+127)&{`NE+2{|SumExpTmpTmp}};
|
|
|
|
// Determine if the result is denormal
|
|
assign PreResultDenorm = $signed(SumExpTmp)<=0 & ($signed(SumExpTmp)>=$signed(-FracLen)) & ~SumZero;
|
|
|
|
// Determine the shift needed for denormal results
|
|
// - if not denorm add 1 to shift out the leading 1
|
|
assign DenormShift = PreResultDenorm ? SumExpTmp[8:0] : 1; //*** change this when changing the size of DenormShift also change to an and opperation
|
|
// Normalize the sum
|
|
assign SumShifted = {2'b0, SumM} << NormCntM+DenormShift; //*** fix mux's with constants in them //***NormCnt can be simplified
|
|
// LZA correction
|
|
assign LZAPlus1 = SumShifted[3*`NF+7];
|
|
assign CorrSumShifted = LZAPlus1 ? SumShifted[3*`NF+6:1] : SumShifted[3*`NF+5:0];
|
|
assign NormSum = CorrSumShifted[3*`NF+5:2*`NF+3];
|
|
// Calculate the sticky bit
|
|
assign NormSumSticky = (|CorrSumShifted[2*`NF+2:0]) | (|CorrSumShifted[136:2*`NF+3]&~FmtM);
|
|
assign UfSticky = AddendStickyM | NormSumSticky;
|
|
|
|
// Determine sum's exponent
|
|
assign SumExp = (SumExpTmp+LZAPlus1+(~|SumExpTmp&SumShifted[3*`NF+6])) & {`NE+2{~(SumZero|ResultDenorm)}};
|
|
// recalculate if the result is denormalized
|
|
assign ResultDenorm = PreResultDenorm&~SumShifted[3*`NF+6]&~SumShifted[3*`NF+7];
|
|
|
|
endmodule
|
|
|
|
module fmaround(
|
|
input logic FmtM, // precision 1 = double 0 = single
|
|
input logic [2:0] FrmM, // rounding mode
|
|
input logic UfSticky, // sticky bit for underlow calculation
|
|
input logic [`NF+2:0] NormSum, // normalized sum
|
|
input logic AddendStickyM, // addend's sticky bit
|
|
input logic NormSumSticky, // normalized sum's sticky bit
|
|
input logic ZZeroM, // is Z zero
|
|
input logic InvZM, // invert Z
|
|
input logic [`NE+1:0] SumExp, // exponent of the normalized sum
|
|
input logic ResultSgn, // the result's sign
|
|
output logic CalcPlus1, Plus1, UfPlus1, Minus1, // do you add or subtract on from the result
|
|
output logic [`NE+1:0] FullResultExp, // ResultExp with bits to determine sign and overflow
|
|
output logic [`NF-1:0] ResultFrac, // Result fraction
|
|
output logic [`NE-1:0] ResultExp, // Result exponent
|
|
output logic Sticky, // sticky bit
|
|
output logic Round, Guard, UfRound, UfLSBNormSum // bits needed to calculate rounding
|
|
);
|
|
logic LSBNormSum; // bit used for rounding - least significant bit of the normalized sum
|
|
logic SubBySmallNum, UfSubBySmallNum; // was there supposed to be a subtraction by a small number
|
|
logic UfGuard; // gaurd bit used to caluculate underflow
|
|
logic UfCalcPlus1, CalcMinus1; // do you add or subtract on from the result
|
|
logic [`FLEN:0] RoundAdd; // how much to add to the result
|
|
logic [`NF-1:0] NormSumTruncated; // the normalized sum trimed to fit the mantissa
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// Rounding
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
|
|
// round to nearest even
|
|
// {Guard, Round, Sticky}
|
|
// 0xx - do nothing
|
|
// 100 - tie - Plus1 if result is odd (LSBNormSum = 1)
|
|
// - don't add 1 if a small number was supposed to be subtracted
|
|
// 101 - do nothing if a small number was supposed to subtracted (the sticky bit was set by the small number)
|
|
// 110/111 - Plus1
|
|
|
|
// round to zero - subtract 1 if a small number was supposed to be subtracted from a positive result with guard and round bits of 0
|
|
|
|
// round to -infinity
|
|
// - Plus1 if negative unless a small number was supposed to be subtracted from a result with guard and round bits of 0
|
|
// - subtract 1 if a small number was supposed to be subtracted from a positive result with guard and round bits of 0
|
|
|
|
// round to infinity
|
|
// - Plus1 if positive unless a small number was supposed to be subtracted from a result with guard and round bits of 0
|
|
// - subtract 1 if a small number was supposed to be subtracted from a negative result with guard and round bits of 0
|
|
|
|
// round to nearest max magnitude
|
|
// {Guard, Round, Sticky}
|
|
// 0xx - do nothing
|
|
// 100 - tie - Plus1
|
|
// - don't add 1 if a small number was supposed to be subtracted
|
|
// 101 - do nothing if a small number was supposed to subtracted (the sticky bit was set by the small number)
|
|
// 110/111 - Plus1
|
|
|
|
// determine guard, round, and least significant bit of the result
|
|
assign Guard = FmtM ? NormSum[2] : NormSum[31];
|
|
assign Round = FmtM ? NormSum[1] : NormSum[30];
|
|
assign LSBNormSum = FmtM ? NormSum[3] : NormSum[32];
|
|
|
|
// used to determine underflow flag
|
|
assign UfGuard = FmtM ? NormSum[1] : NormSum[30];
|
|
assign UfRound = FmtM ? NormSum[0] : NormSum[29];
|
|
assign UfLSBNormSum = FmtM ? NormSum[2] : NormSum[31];
|
|
|
|
// determine sticky
|
|
assign Sticky = UfSticky | NormSum[0];
|
|
// Deterimine if a small number was supposed to be subtrated
|
|
assign SubBySmallNum = AddendStickyM & InvZM & ~(NormSumSticky|UfRound) & ~ZZeroM; //***here
|
|
assign UfSubBySmallNum = AddendStickyM & InvZM & ~(NormSumSticky) & ~ZZeroM; //***here
|
|
|
|
always_comb begin
|
|
// Determine if you add 1
|
|
case (FrmM)
|
|
3'b000: CalcPlus1 = Guard & (Round | ((Sticky)&~(~Round&SubBySmallNum)) | (~Round&~(Sticky)&LSBNormSum&~SubBySmallNum));//round to nearest even
|
|
3'b001: CalcPlus1 = 0;//round to zero
|
|
3'b010: CalcPlus1 = ResultSgn & ~(SubBySmallNum & ~Guard & ~Round);//round down
|
|
3'b011: CalcPlus1 = ~ResultSgn & ~(SubBySmallNum & ~Guard & ~Round);//round up
|
|
3'b100: CalcPlus1 = (Guard & (Round | ((Sticky)&~(~Round&SubBySmallNum)) | (~Round&~(Sticky)&~SubBySmallNum)));//round to nearest max magnitude
|
|
default: CalcPlus1 = 1'bx;
|
|
endcase
|
|
// Determine if you add 1 (for underflow flag)
|
|
case (FrmM)
|
|
3'b000: UfCalcPlus1 = UfGuard & (UfRound | (UfSticky&UfRound|~UfSubBySmallNum) | (~Sticky&UfLSBNormSum&~UfSubBySmallNum));//round to nearest even
|
|
3'b001: UfCalcPlus1 = 0;//round to zero
|
|
3'b010: UfCalcPlus1 = ResultSgn & ~(UfSubBySmallNum & ~UfGuard & ~UfRound);//round down
|
|
3'b011: UfCalcPlus1 = ~ResultSgn & ~(UfSubBySmallNum & ~UfGuard & ~UfRound);//round up
|
|
3'b100: UfCalcPlus1 = (UfGuard & (UfRound | (UfSticky&~(~UfRound&UfSubBySmallNum)) | (~Sticky&~UfSubBySmallNum)));//round to nearest max magnitude
|
|
default: UfCalcPlus1 = 1'bx;
|
|
endcase
|
|
// Determine if you subtract 1
|
|
case (FrmM)
|
|
3'b000: CalcMinus1 = 0;//round to nearest even
|
|
3'b001: CalcMinus1 = SubBySmallNum & ~Guard & ~Round;//round to zero
|
|
3'b010: CalcMinus1 = ~ResultSgn & ~Guard & ~Round & SubBySmallNum;//round down
|
|
3'b011: CalcMinus1 = ResultSgn & ~Guard & ~Round & SubBySmallNum;//round up
|
|
3'b100: CalcMinus1 = 0;//round to nearest max magnitude
|
|
default: CalcMinus1 = 1'bx;
|
|
endcase
|
|
|
|
end
|
|
|
|
// If an answer is exact don't round
|
|
assign Plus1 = CalcPlus1 & (Sticky | Guard | Round);
|
|
assign UfPlus1 = UfCalcPlus1 & (Sticky | UfGuard);//UfRound is part of sticky
|
|
assign Minus1 = CalcMinus1 & (Sticky | Guard | Round);
|
|
|
|
// Compute rounded result
|
|
assign RoundAdd = FmtM ? Minus1 ? {`FLEN+1{1'b1}} : {{{`FLEN{1'b0}}}, Plus1} :
|
|
Minus1 ? {{36{1'b1}}, 29'b0} : {35'b0, Plus1, 29'b0};
|
|
assign NormSumTruncated = {NormSum[`NF+2:32], NormSum[31:3]&{29{FmtM}}};
|
|
|
|
assign {FullResultExp, ResultFrac} = {SumExp, NormSumTruncated} + RoundAdd;
|
|
assign ResultExp = FullResultExp[`NE-1:0];
|
|
|
|
|
|
endmodule
|
|
|
|
module fmaflags(
|
|
input logic XSNaNM, YSNaNM, ZSNaNM, // inputs are signaling NaNs
|
|
input logic XInfM, YInfM, ZInfM, // inputs are infinity
|
|
input logic XZeroM, YZeroM, // inputs are zero
|
|
input logic XNaNM, YNaNM, ZNaNM, // inputs are NaN
|
|
input logic [`NE+1:0] FullResultExp, // ResultExp with bits to determine sign and overflow
|
|
input logic [`NE+1:0] SumExp, // exponent of the normalized sum
|
|
input logic ZSgnEffM, PSgnM, // the product and modified Z signs
|
|
input logic Round, Guard, UfRound, UfLSBNormSum, Sticky, UfPlus1, // bits used to determine rounding
|
|
input logic FmtM, // precision 1 = double 0 = single
|
|
output logic Invalid, Overflow, Underflow, // flags used to select the result
|
|
output logic [4:0] FMAFlgM // FMA flags
|
|
);
|
|
logic [`NE+1:0] MaxExp; // maximum value of the exponent
|
|
logic SigNaN; // is an input a signaling NaN
|
|
logic UnderflowFlag, Inexact; // flags
|
|
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
// Flags
|
|
///////////////////////////////////////////////////////////////////////////////
|
|
|
|
|
|
|
|
// Set Invalid flag for following cases:
|
|
// 1) any input is a signaling NaN
|
|
// 2) Inf - Inf (unless x or y is NaN)
|
|
// 3) 0 * Inf
|
|
|
|
// assign MaxExp = FmtM ? {`NE{1'b1}} : {8{1'b1}};
|
|
assign SigNaN = XSNaNM | YSNaNM | ZSNaNM;
|
|
assign Invalid = SigNaN | ((XInfM || YInfM) & ZInfM & (PSgnM ^ ZSgnEffM) & ~XNaNM & ~YNaNM) | (XZeroM & YInfM) | (YZeroM & XInfM);
|
|
|
|
// Set Overflow flag if the number is too big to be represented
|
|
// - Don't set the overflow flag if an overflowed result isn't outputed
|
|
logic LtMaxExp;
|
|
assign LtMaxExp = FmtM ? &FullResultExp[`NE-1:0] | FullResultExp[`NE] : &FullResultExp[7:0] | FullResultExp[8];
|
|
assign Overflow = LtMaxExp & ~FullResultExp[`NE+1]&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
|
|
|
|
// Set Underflow flag if the number is too small to be represented in normal numbers
|
|
// - Don't set the underflow flag if the result is exact
|
|
|
|
assign Underflow = (SumExp[`NE+1] | ((SumExp == 0) & (Round|Guard|Sticky)))&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
|
|
assign UnderflowFlag = (FullResultExp[`NE+1] | ((FullResultExp == 0) | ((FullResultExp == 1) & (SumExp == 0) & ~(UfPlus1&UfLSBNormSum)))&(Round|Guard|Sticky))&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
|
|
// Set Inexact flag if the result is diffrent from what would be outputed given infinite precision
|
|
// - Don't set the underflow flag if an underflowed result isn't outputed
|
|
assign Inexact = (Sticky|Overflow|Guard|Round|Underflow)&~(XNaNM|YNaNM|ZNaNM|XInfM|YInfM|ZInfM);
|
|
|
|
// Combine flags
|
|
// - FMA can't set the Divide by zero flag
|
|
// - Don't set the underflow flag if the result was rounded up to a normal number
|
|
assign FMAFlgM = {Invalid, 1'b0, Overflow, UnderflowFlag, Inexact};
|
|
|
|
endmodule |