forked from Github_Repos/cvw
00de91cc87
Fixed some typos with the names of signals in the branch predictor. They were causing signals to be not set. Note there is a modelsim flag which prevents it from compiling if a logic is undefined. I will look this up and add it to the compiler.
1623 lines
122 KiB
Plaintext
1623 lines
122 KiB
Plaintext
onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate /testbench/clk
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add wave -noupdate /testbench/reset
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add wave -noupdate /testbench/memfilename
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/PCE
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add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -divider <NULL>
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add wave -noupdate /testbench/dut/hart/ebu/IReadF
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add wave -noupdate /testbench/dut/hart/DataStall
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add wave -noupdate /testbench/dut/hart/InstrStall
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add wave -noupdate /testbench/dut/hart/StallF
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add wave -noupdate /testbench/dut/hart/StallD
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add wave -noupdate /testbench/dut/hart/FlushD
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add wave -noupdate /testbench/dut/hart/FlushE
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add wave -noupdate /testbench/dut/hart/FlushM
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add wave -noupdate /testbench/dut/hart/FlushW
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add wave -noupdate -divider <NULL>
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrF
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add wave -noupdate /testbench/InstrFName
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrD
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add wave -noupdate /testbench/InstrDName
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add wave -noupdate -divider <NULL>
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add wave -noupdate -expand -group {Decode Stage} /testbench/dut/hart/ieu/InstrD
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add wave -noupdate -expand -group {Decode Stage} /testbench/dut/hart/ieu/dp/RdD
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add wave -noupdate -expand -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs1D
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add wave -noupdate -expand -group {Decode Stage} /testbench/dut/hart/ieu/dp/Rs2D
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rf
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/a1
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/a2
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/a3
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd1
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/we3
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcBE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultE
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add wave -noupdate /testbench/dut/hart/ieu/dp/PCSrcE
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add wave -noupdate -divider <NULL>
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add wave -noupdate /testbench/InstrMName
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add wave -noupdate /testbench/dut/uncore/dtim/memwrite
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add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HADDR
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add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HWDATA
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add wave -noupdate -divider <NULL>
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCW
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add wave -noupdate /testbench/InstrWName
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add wave -noupdate /testbench/dut/hart/ieu/dp/RegWriteW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ResultW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdW
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add wave -noupdate -divider <NULL>
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add wave -noupdate -radix hexadecimal /testbench/clk
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add wave -noupdate -radix hexadecimal /testbench/reset
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add wave -noupdate -radix hexadecimal /testbench/test
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add wave -noupdate -radix hexadecimal /testbench/i
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add wave -noupdate -radix hexadecimal /testbench/errors
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add wave -noupdate -radix hexadecimal /testbench/totalerrors
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add wave -noupdate -radix hexadecimal /testbench/testadr
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add wave -noupdate -radix hexadecimal /testbench/InstrW
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add wave -noupdate -radix hexadecimal /testbench/meminit
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add wave -noupdate -radix hexadecimal /testbench/HRDATAEXT
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add wave -noupdate -radix hexadecimal /testbench/HREADYEXT
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add wave -noupdate -radix hexadecimal /testbench/HRESPEXT
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add wave -noupdate -radix hexadecimal /testbench/HADDR
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add wave -noupdate -radix hexadecimal /testbench/HWDATA
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add wave -noupdate -radix hexadecimal /testbench/HWRITE
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add wave -noupdate -radix hexadecimal /testbench/HSIZE
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add wave -noupdate -radix hexadecimal /testbench/HBURST
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add wave -noupdate -radix hexadecimal /testbench/HPROT
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add wave -noupdate -radix hexadecimal /testbench/HTRANS
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add wave -noupdate -radix hexadecimal /testbench/HMASTLOCK
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add wave -noupdate -radix hexadecimal /testbench/HCLK
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add wave -noupdate -radix hexadecimal /testbench/HRESETn
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add wave -noupdate -radix hexadecimal /testbench/GPIOPinsIn
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add wave -noupdate -radix hexadecimal /testbench/GPIOPinsOut
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add wave -noupdate -radix hexadecimal /testbench/GPIOPinsEn
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add wave -noupdate -radix hexadecimal /testbench/UARTSin
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add wave -noupdate -radix hexadecimal /testbench/UARTSout
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add wave -noupdate -radix hexadecimal /testbench/dut/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/reset
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add wave -noupdate -radix hexadecimal /testbench/dut/HRDATAEXT
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add wave -noupdate -radix hexadecimal /testbench/dut/HREADYEXT
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add wave -noupdate -radix hexadecimal /testbench/dut/HRESPEXT
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add wave -noupdate -radix hexadecimal /testbench/dut/HCLK
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add wave -noupdate -radix hexadecimal /testbench/dut/HRESETn
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add wave -noupdate -radix hexadecimal /testbench/dut/HADDR
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add wave -noupdate -radix hexadecimal /testbench/dut/HWDATA
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add wave -noupdate -radix hexadecimal /testbench/dut/HWRITE
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add wave -noupdate -radix hexadecimal /testbench/dut/HSIZE
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add wave -noupdate -radix hexadecimal /testbench/dut/HBURST
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add wave -noupdate -radix hexadecimal /testbench/dut/HPROT
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add wave -noupdate -radix hexadecimal /testbench/dut/HTRANS
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add wave -noupdate -radix hexadecimal /testbench/dut/HMASTLOCK
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add wave -noupdate -radix hexadecimal /testbench/dut/GPIOPinsIn
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add wave -noupdate -radix hexadecimal /testbench/dut/GPIOPinsOut
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add wave -noupdate -radix hexadecimal /testbench/dut/GPIOPinsEn
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add wave -noupdate -radix hexadecimal /testbench/dut/UARTSin
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add wave -noupdate -radix hexadecimal /testbench/dut/UARTSout
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add wave -noupdate -radix hexadecimal /testbench/dut/PCF
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add wave -noupdate -radix hexadecimal /testbench/dut/InstrF
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add wave -noupdate -radix hexadecimal /testbench/dut/HRDATA
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add wave -noupdate -radix hexadecimal /testbench/dut/HREADY
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add wave -noupdate -radix hexadecimal /testbench/dut/HRESP
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add wave -noupdate -radix hexadecimal /testbench/dut/InstrAccessFaultF
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add wave -noupdate -radix hexadecimal /testbench/dut/DataAccessFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/TimerIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/SwIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/ExtIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/reset
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/TimerIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ExtIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/SwIntM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrAccessFaultF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/DataAccessFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HRDATA
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HREADY
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HRESP
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HCLK
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HRESETn
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HADDR
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HWDATA
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HWRITE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HSIZE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HBURST
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HPROT
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HTRANS
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/HMASTLOCK
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ForwardAE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ForwardBE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/StallF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/StallD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FlushD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FlushE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FlushM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FlushW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/RetM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/TrapM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/CSRWriteM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PrivilegedM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/SrcAM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCLinkW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCTargetE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/CSRReadValW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PrivilegedNextPCM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/MemRWM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrValidW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/DataMisalignedM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/IllegalBaseInstrFaultD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/IllegalIEUInstrFaultD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/LoadMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/LoadAccessFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/StoreMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/StoreAccessFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrMisalignedAdrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/zero
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/PCSrcE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/CSRWritePendingDEM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/LoadStallD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/SetFflagsM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FRM_REGW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/FloatRegWriteW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/MemRWAlignedM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/Funct3M
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/MemAdrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/MemPAdrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/WriteDataM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ReadDataM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ReadDataW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrPAdrF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/DataStall
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrStall
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/InstrAckD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/MemAckW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/reset
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/StallF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/StallD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/FlushD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/FlushE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/FlushM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/FlushW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrPAdrF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrStall
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCSrcE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCTargetE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/RetM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/TrapM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PrivilegedNextPCM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCLinkW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/IllegalBaseInstrFaultD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/IllegalIEUInstrFaultD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedAdrM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/UnalignedPCNextF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCNextF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/misaligned
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/BranchMisalignedFaultE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/BranchMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/TrapMisalignedFaultM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/StallExceptResolveBranchesF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PrivilegedChangePCM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/IllegalCompInstrD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPlusUpperF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPlus2or4F
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCW
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCLinkD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCLinkE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCLinkM
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/CompressedF
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrRawD
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/nop
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcmux/d0
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcmux/d1
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcmux/d2
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcmux/s
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcmux/y
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/load
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/en
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/d
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/val
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/pcreg/q
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/load
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/en
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/d
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/val
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrDReg/q
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/clk
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCDReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/InstrRawD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/InstrD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/IllegalCompInstrD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/instr16
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rds1
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rs2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rs1p
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rs2p
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rds1p
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/rdp
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCILSP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCILSPD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCSS
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCSSD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCLD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCI
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCS
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCSD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCB
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCIASP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCIW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCJ
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immCILUI
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/immSH
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/decomp/op
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalginedReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalginedReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalginedReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalginedReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedAdrReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedAdrReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedAdrReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMisalignedAdrReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrEReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrEReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrEReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrEReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/InstrMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCEReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCEReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCEReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCEReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCMReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCMReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCMReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCWReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPDReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPDReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPDReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPDReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPEReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPEReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPEReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPEReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPMReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPMReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPMReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPWReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ifu/PCPWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/InstrD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/IllegalIEUInstrFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/IllegalBaseInstrFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/PCE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/PCTargetE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/DataMisalignedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/DataAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/MemRWM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/MemAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/WriteDataM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/SrcAM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/Funct3M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ReadDataW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/CSRReadValW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/PCLinkW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/InstrValidW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/StallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/FlushD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/FlushM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RetM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/PCSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/CSRWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/PrivilegedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/CSRWritePendingDEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ImmSrcD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/FlagsE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ALUControlE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ALUSrcAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ALUSrcBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ResultSrcW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/TargetSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/Rs1D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/Rs2D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/Rs1E
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/Rs2E
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RdE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RdM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RdW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ForwardAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/ForwardBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RegWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/RegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/MemReadE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/OpD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/Funct3D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/Funct7b5D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ImmSrcD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/StallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/FlushD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/IllegalIEUInstrFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/IllegalBaseInstrFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/FlagsE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/PCSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUControlE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUSrcAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUSrcBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/TargetSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/MemReadE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/FlushM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/DataMisalignedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/MemRWM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/CSRWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/PrivilegedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/Funct3M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/RegWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/RegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ResultSrcW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/InstrValidW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/CSRWritePendingDEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/RegWriteD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/RegWriteE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ResultSrcD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ResultSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ResultSrcM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/MemRWD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/MemRWE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/JumpD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/JumpE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/BranchD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/BranchE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUOpD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUControlD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUSrcAD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ALUSrcBD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/TargetSrcD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/W64D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/CSRWriteD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/CSRWriteE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/Funct3E
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/InstrValidE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/InstrValidM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/PrivilegedD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/PrivilegedE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ControlsD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/aluc3D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/subD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/sraD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/sltD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/sltuD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/BranchTakenE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/zeroE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ltE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/ltuE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregE/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregE/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregE/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregE/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregE/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregM/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregM/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregM/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregM/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregM/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregW/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregW/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregW/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregW/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/c/controlregW/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/StallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/FlushD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ImmSrcD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/InstrD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ForwardAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ForwardBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/PCSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUControlE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUSrcAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUSrcBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/TargetSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/PCE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/FlagsE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/PCTargetE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/FlushM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Funct3M
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/CSRReadValW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ReadDataW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RetM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/TrapM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/MemAdrM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/FlushW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RegWriteW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ResultSrcW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/PCLinkW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1D
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2D
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1D
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2D
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmD
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdD
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/PreSrcAE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcBE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/TargetBaseE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ResultW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/we3
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/a1
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/a2
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/a3
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/wd3
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/rd1
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/rd2
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/regf/i
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ext/InstrD
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ext/ImmSrcD
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ext/ExtImmD
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1EReg/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1EReg/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1EReg/clear
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1EReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD1EReg/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2EReg/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2EReg/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2EReg/clear
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2EReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RD2EReg/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmEReg/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmEReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmEReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmEReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ExtImmEReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1EReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1EReg/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1EReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1EReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs1EReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2EReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2EReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2EReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2EReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/Rs2EReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdEReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdEReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdEReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdEReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdEReg/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/faemux/d0
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/faemux/d1
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/faemux/d2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/faemux/s
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/faemux/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/fbemux/d0
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/fbemux/d1
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/fbemux/d2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/fbemux/s
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/fbemux/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcamux/d0
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcamux/d1
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcamux/s
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcamux/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/d0
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/d1
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/s
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/srcbmux/y
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/a
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/b
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/alucontrol
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/result
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/flags
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/condinvb
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/presum
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sum
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/shift
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/slt
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sltu
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/bor
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/right
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/arith
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/w64
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/carry
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/zero
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/neg
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/lt
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/ltu
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/overflow
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/a
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/amt
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/right
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/arith
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/w64
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/z
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/zshift
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/ylower
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/yupper
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/offset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/alu/sh/genblk1/amt6
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/targetsrcmux/d0
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/targetsrcmux/d1
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/targetsrcmux/s
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/targetsrcmux/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAMReg/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAMReg/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAMReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAMReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/SrcAMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultMReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultMReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultMReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultMReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataMReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataMReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataMReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataMReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/WriteDataMReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdMEg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdMEg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdMEg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdMEg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdMEg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultWReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultWReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/ALUResultWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdWEg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdWEg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdWEg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdWEg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/RdWEg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/d0
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/d1
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/d2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/d3
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/s
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/dp/resultmux/y
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/Rs1D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/Rs2D
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/Rs1E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/Rs2E
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/RdE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/RdM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/RdW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/MemReadE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/RegWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/RegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/ForwardAE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/ForwardBE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ieu/fw/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/DataStall
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/MemRWM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/MemAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/Funct3M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/WriteDataM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/MemPAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/MemRWAlignedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/DataMisalignedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/MemAckW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/DataAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/LoadMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/LoadAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/StoreMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/StoreAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataWReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataWReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/dmem/ReadDataWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/UnsignedLoadM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/InstrPAdrF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/IReadF
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/IRData
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/MemPAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/DReadM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/DWriteM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/WriteDataM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/DSizeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/DRData
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HRDATA
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HREADY
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HRESP
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HCLK
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HWRITE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HSIZE
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HBURST
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HPROT
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HTRANS
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HMASTLOCK
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/InstrAckD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/MemAckW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/GrantData
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/ISize
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/HRDATAMasked
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/IReady
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/DReady
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/HRDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/UnsignedLoadM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/HSIZE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/HRDATAMasked
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/ByteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/HalfwordM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/ebu/swr/genblk1/WordM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/PCSrcE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/CSRWritePendingDEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/RetM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/InstrStall
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/DataStall
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/StallF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/StallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/FlushD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/FlushM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/BranchFlushDE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/StallDCause
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/StallFCause
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/hzu/StallWCause
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/CSRWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SrcAM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/PCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/CSRReadValW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/PrivilegedNextPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/RetM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrValidW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FloatRegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/PrivilegedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrAccessFaultF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/IllegalIEUInstrFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/LoadMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/LoadAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/StoreMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/StoreAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/TimerIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/ExtIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SwIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrMisalignedAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MemAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SetFflagsM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FRM_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FlushD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/FlushM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/StallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/NextPrivilegeModeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/CauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/NextFaultMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/UEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/UTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/SIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/uretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/sretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/mretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/ecallM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/ebreakM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/wfiM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/sfencevmaM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/IllegalCSRAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/IllegalIEUInstrFaultE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/IllegalIEUInstrFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrAccessFaultD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrAccessFaultE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/IllegalInstrFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/BreakpointFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/EcallFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/InstrPageFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/LoadPageFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/StorePageFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/UTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STATUS_MPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STATUS_SPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STATUS_TSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STATUS_MIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/STATUS_SIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/MIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/md
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/sd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/privmodereg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/privmodereg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/privmodereg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/InstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/PrivilegedM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/IllegalIEUInstrFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/IllegalCSRAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/STATUS_TSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/IllegalInstrFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/uretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/sretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/mretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/ecallM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/ebreakM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/wfiM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/sfencevmaM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/pmd/IllegalPrivilegedInstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/FlushW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/InstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/PCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SrcAM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/mretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/sretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/uretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/TimerIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/ExtIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SwIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/InstrValidW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/FloatRegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/NextPrivilegeModeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/NextFaultMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STATUS_MPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STATUS_SPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STATUS_TSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STATUS_MIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/STATUS_SIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SetFflagsM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/FRM_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRReadValW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRMReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRSReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRUReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRNReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRCReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRSrcM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRRWM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRRSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRRCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/USTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MCOUNTINHIBIT_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/MCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/WriteMSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/WriteSSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/WriteUSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRMWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRSWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRUWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UnalignedNextEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/NextEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/NextCauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/NextMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/SIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/UIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRCAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRMAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRSAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRUAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/IllegalCSRNAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/InsufficientCSRPrivilegeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/CSRMWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/CSRSWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/ExtIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/TimerIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/SwIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/MIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/MIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/MIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/SIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/SIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/IntInM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/IP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/IE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/MIP_WRITE_MASK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/SIP_WRITE_MASK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/WriteMIPM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/WriteMIEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/WriteSIPM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csri/WriteSIEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/WriteMSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/WriteSSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/WriteUSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/FloatRegWriteW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/NextPrivilegeModeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/mretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/sretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/uretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/MSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/SSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/USTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SPP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_TSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_TW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_TVM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MXR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SUM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SUM_INT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPRV
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPRV_INT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SXL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_UXL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_XS
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_FS
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_FS_INT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPP_NEXT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_MPIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_SPIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_UPIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrsr/STATUS_UIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/InstrValidW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/LoadStallD
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/CSRMWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/MCOUNTINHIBIT_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/MCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/SCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/CSRCReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/IllegalCSRCAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/CYCLE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/INSTRET_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTER3_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTER4_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/CYCLEPlusM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/INSTRETPlusM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTER3PlusM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/HPMCOUNTER4PlusM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/NextCYCLEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/NextINSTRETM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/NextHPMCOUNTER3M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/NextHPMCOUNTER4M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/WriteCYCLEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/WriteINSTRETM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/WriteHPMCOUNTER3M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/WriteHPMCOUNTER4M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/CounterNumM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/CYCLEreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/CYCLEreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/CYCLEreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/CYCLEreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/INSTRETreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/INSTRETreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/INSTRETreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/INSTRETreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER3reg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER3reg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER3reg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER3reg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER4reg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER4reg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER4reg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/counters/genblk1/genblk1/HPMCOUNTER4reg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/CSRMWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/NextEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/NextCauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/NextMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/CSRMReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBIT_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/IllegalCSRMAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MISA_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCH_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVAL_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPCFG01_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPCFG23_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/zero
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/allones
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEDELEG_MASK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MIDELEG_MASK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMTVECM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMEDELEGM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMIDELEGM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMSCRATCHM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMCAUSEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMTVALM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMCOUNTERENM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WriteMCOUNTINHIBITM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WritePMPCFG0M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WritePMPCFG2M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/WritePMPADDR0M
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MISAbits
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG01reg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG01reg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG01reg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG01reg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG01reg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG23reg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG23reg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG23reg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG23reg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk2/PMPCFG23reg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MEDELEGreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/genblk1/MIDELEGreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVECreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCHreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPCreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPCreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPCreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPCreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MEPCreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSEreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVALreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVALreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVALreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVALreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MTVALreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTERENreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBITreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0reg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0reg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0reg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0reg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR0reg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/CSRSWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/STrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/NextEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/NextCauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/NextMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SSTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/CSRSReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/STVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SCOUNTEREN_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SEDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SIDELEG_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/WriteSSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/IllegalCSRSAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/zero
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/allones
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/SEDELEG_MASK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSTVECM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSEDELEGM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSIDELEGM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSSCRATCHM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSCAUSEM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSTVALM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSATPM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/WriteSCOUNTERENM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCH_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVAL_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVECreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SSCRATCHreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SEPCreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCAUSEreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/STVALreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SATPreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/load
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/en
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/val
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrs/genblk1/SCOUNTERENreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/CSRNWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/UTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/NextEPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/NextCauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/NextMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/USTATUS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/CSRNReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/UEPC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/UTVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/UIP_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/UIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/WriteUSTATUSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csrn/IllegalCSRNAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/CSRUWriteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/CSRAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/CSRWriteValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/CSRUReadValM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/SetFflagsM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/FRM_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/IllegalCSRUAccessM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGS_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/WriteFFLAGSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/WriteFRMM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/WriteFCSRM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/NextFRMM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/NextFFLAGSM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/en
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FRMreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/csru/genblk1/FFLAGSreg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/CSRValWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/CSRValWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/CSRValWReg/clear
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/CSRValWReg/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/csr/genblk1/CSRValWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/clear
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/en
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregD/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregE/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregE/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregE/clear
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregE/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregE/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregM/clk
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregM/reset
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregM/clear
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregM/d
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/faultregM/q
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InstrMisalignedFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InstrAccessFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/IllegalInstrFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/BreakpointFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/LoadMisalignedFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/StoreMisalignedFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/LoadAccessFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/StoreAccessFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/EcallFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InstrPageFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/LoadPageFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/StorePageFaultM
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/mretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/sretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/uretM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/PrivilegeModeW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/NextPrivilegeModeM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MEPC_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/SEPC_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/UEPC_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/UTVEC_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/STVEC_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MTVEC_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MIP_REGW
|
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add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MIE_REGW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/STATUS_MIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/STATUS_SIE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InstrMisalignedAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MemAdrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/TrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/STrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/UTrapM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/RetM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/PrivilegedNextPCM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/CauseM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/NextFaultMtvalM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/MIntGlobalEnM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/SIntGlobalEnM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/PendingIntsM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/hart/priv/trap/InterruptM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/AdrF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/InstrF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/InstrAccessFaultF
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/adrbits
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/rd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/imem/rd2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HWDATAIN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HWRITE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HSIZE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HBURST
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HPROT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HTRANS
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HMASTLOCK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRDATAEXT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADYEXT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESPEXT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADY
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/DataAccessFaultM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/TimerIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/SwIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/GPIOPinsIn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/GPIOPinsOut
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/GPIOPinsEn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/UARTSin
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/UARTSout
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HSELTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HSELCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HSELGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/PreHSELUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HSELUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESPTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESPCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESPGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HRESPUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADYTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADYCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADYGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/HREADYUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/MemRW
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/MemRWtim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/MemRWclint
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/MemRWgpio
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/MemRWuart
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/UARTIntr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/timdec/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/timdec/Base
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/timdec/Range
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/timdec/HSEL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/timdec/match
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clintdec/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clintdec/Base
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clintdec/Range
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clintdec/HSEL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clintdec/match
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpiodec/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpiodec/Base
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpiodec/Range
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpiodec/HSEL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpiodec/match
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uartdec/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uartdec/Base
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uartdec/Range
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uartdec/HSEL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uartdec/match
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HRDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HSIZE
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HWDATAIN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/ByteM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/HalfwordM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/WriteDataSubwordDuplicated
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/sww/ByteMaskM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/MemRWtim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HSELTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HREADTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HRESPTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/HREADYTim
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/entry
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/memread
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/memwrite
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/dtim/busycount
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/MemRWclint
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HREADCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HRESPCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/HREADYCLINT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/TimerIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/SwIntM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/MTIMECMP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/MTIME
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/MSIP
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/entry
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/memread
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/clint/memwrite
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/MemRWgpio
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HREADGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HRESPGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/HREADYGPIO
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/GPIOPinsIn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/GPIOPinsOut
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/GPIOPinsEn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/INPUT_VAL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/INPUT_EN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/OUTPUT_EN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/OUTPUT_VAL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/entry
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/memread
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/gpio/memwrite
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/MemRWuart
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HADDR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HWDATA
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HREADUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HRESPUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/HREADYUART
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/SIN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/DSRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/DCDb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/CTSb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/RIb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/SOUT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/RTSb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/DTRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/OUT1b
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/OUT2b
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/INTR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/TXRDYb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/RXRDYb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/A
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/MEMRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/MEMWb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/Din
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/Dout
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/BAUDOUTb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/HCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/HRESETn
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/A
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/Din
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/Dout
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/MEMRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/MEMWb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/INTR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/TXRDYb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RXRDYb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/BAUDOUTb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RCLK
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SIN
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DSRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DCDb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/CTSb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RIb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SOUT
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RTSb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DTRb
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/OUT1b
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/OUT2b
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RBR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/FCR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/LCR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/LSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SCR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DLL
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DLM
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/IER
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/MSR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/MCR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SINd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DSRbd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DCDbd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/CTSbd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RIbd
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SINsync
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DSRbsync
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DCDbsync
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/CTSbsync
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RIbsync
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DSRb2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DCDb2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/CTSb2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RIb2
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/SOUTbit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/loop
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/DLAB
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/baudpulse
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txbaudpulse
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxbaudpulse
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/baudcount
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxoversampledcnt
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txoversampledcnt
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxbitsreceived
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txbitssent
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxstate
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txstate
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxshiftreg
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifohead
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifotail
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifohead
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifotail
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifotriggerlevel
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifoentries
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifoentries
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxbitsexpected
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txbitsexpected
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/RXBR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxtimeoutcnt
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxcentered
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxparity
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxparitybit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxstopbit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxparityerr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxoverrunerr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxframingerr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxbreak
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifohaserr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxdataready
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifoempty
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifotriggered
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifotimeout
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfifodmaready
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxdata9
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxdata
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxerrbit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxfullbit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/TXHR
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txdata
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/nexttxdata
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txsr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txnextbit
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txhrfull
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txsrfull
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txparity
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifoempty
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifofull
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txfifodmaready
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/fifoenabled
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/fifodmamodesel
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/evenparitysel
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxlinestatusintr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/rxdataavailintr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/txhremptyintr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/modemstatusintr
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/intrpending
|
|
add wave -noupdate -radix hexadecimal /testbench/dut/uncore/uart/u/intrid
|
|
add wave -noupdate -radix hexadecimal /testbench/it/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/it/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/it/FlushE
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrD
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrE
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrM
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrW
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrWReg/clk
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrWReg/reset
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrWReg/d
|
|
add wave -noupdate -radix hexadecimal /testbench/it/InstrWReg/q
|
|
add wave -noupdate -radix hexadecimal /testbench/it/ddec/instr
|
|
add wave -noupdate -radix hexadecimal /testbench/it/ddec/op
|
|
add wave -noupdate -radix hexadecimal /testbench/it/ddec/funct3
|
|
add wave -noupdate -radix hexadecimal /testbench/it/ddec/funct7
|
|
add wave -noupdate -radix hexadecimal /testbench/it/ddec/imm
|
|
add wave -noupdate -radix hexadecimal /testbench/it/edec/instr
|
|
add wave -noupdate -radix hexadecimal /testbench/it/edec/op
|
|
add wave -noupdate -radix hexadecimal /testbench/it/edec/funct3
|
|
add wave -noupdate -radix hexadecimal /testbench/it/edec/funct7
|
|
add wave -noupdate -radix hexadecimal /testbench/it/edec/imm
|
|
add wave -noupdate -radix hexadecimal /testbench/it/mdec/instr
|
|
add wave -noupdate -radix hexadecimal /testbench/it/mdec/op
|
|
add wave -noupdate -radix hexadecimal /testbench/it/mdec/funct3
|
|
add wave -noupdate -radix hexadecimal /testbench/it/mdec/funct7
|
|
add wave -noupdate -radix hexadecimal /testbench/it/mdec/imm
|
|
add wave -noupdate -radix hexadecimal /testbench/it/wdec/instr
|
|
add wave -noupdate -radix hexadecimal /testbench/it/wdec/op
|
|
add wave -noupdate -radix hexadecimal /testbench/it/wdec/funct3
|
|
add wave -noupdate -radix hexadecimal /testbench/it/wdec/funct7
|
|
add wave -noupdate -radix hexadecimal /testbench/it/wdec/imm
|
|
TreeUpdate [SetDefaultTree]
|
|
WaveRestoreCursors {{Cursor 2} {330314 ns} 0} {{Cursor 3} {330384 ns} 0}
|
|
quietly wave cursor active 2
|
|
configure wave -namecolwidth 250
|
|
configure wave -valuecolwidth 168
|
|
configure wave -justifyvalue left
|
|
configure wave -signalnamewidth 1
|
|
configure wave -snapdistance 10
|
|
configure wave -datasetprefix 0
|
|
configure wave -rowmargin 4
|
|
configure wave -childrowmargin 2
|
|
configure wave -gridoffset 0
|
|
configure wave -gridperiod 1
|
|
configure wave -griddelta 40
|
|
configure wave -timeline 0
|
|
configure wave -timelineunits ns
|
|
update
|
|
WaveRestoreZoom {330283 ns} {330427 ns}
|