forked from Github_Repos/cvw
238 lines
11 KiB
Systemverilog
238 lines
11 KiB
Systemverilog
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///////////////////////////////////////////
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// fcvt.sv
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//
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// Written: me@KatherineParry.com
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// Modified: 7/5/2022
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//
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// Purpose: Floating point conversions of configurable size
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//
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// Documentation: RISC-V System on Chip Design Chapter 13
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//
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// Int component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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`include "wally-config.vh"
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module fcvt (
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input logic Xs, // input's sign
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input logic [`NE-1:0] Xe, // input's exponent
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input logic [`NF:0] Xm, // input's fraction
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input logic [`XLEN-1:0] Int, // integer input - from IEU
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input logic [2:0] OpCtrl, // choose which opperation (look below for values)
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input logic ToInt, // is fp->int (since it's writting to the integer register)
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input logic XZero, // is the input zero
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input logic [`FMTBITS-1:0] Fmt, // the input's precision (11=quad 01=double 00=single 10=half)
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output logic [`NE:0] Ce, // the calculated expoent
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output logic [`LOGCVTLEN-1:0] ShiftAmt, // how much to shift by
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output logic ResSubnormUf,// does the result underflow or is subnormal
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output logic Cs, // the result's sign
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output logic IntZero, // is the integer zero?
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output logic [`CVTLEN-1:0] LzcIn // input to the Leading Zero Counter (priority encoder)
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);
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// OpCtrls:
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// fp->fp conversions: {0, output precision} - only one of the operations writes to the int register
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// half - 10
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// single - 00
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// double - 01
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// quad - 11
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// int<->fp conversions: {is int->fp?, is the integer 64-bit?, is the integer signed?}
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// bit 2 bit 1 bit 0
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// for example: signed long -> single floating point has the OpCode 101
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logic [`FMTBITS-1:0] OutFmt; // format of the output
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logic [`XLEN-1:0] PosInt; // the positive integer input
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logic [`XLEN-1:0] TrimInt; // integer trimmed to the correct size
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logic [`NE-2:0] NewBias; // the bias of the final result
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logic [`NE-1:0] OldExp; // the old exponent
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logic Signed; // is the opperation with a signed integer?
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logic Int64; // is the integer 64 bits?
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logic IntToFp; // is the opperation an int->fp conversion?
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logic [`CVTLEN:0] LzcInFull; // input to the Leading Zero Counter (priority encoder)
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logic [`LOGCVTLEN-1:0] LeadingZeros; // output from the LZC
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// seperate OpCtrl for code readability
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assign Signed = OpCtrl[0];
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assign Int64 = OpCtrl[1];
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assign IntToFp = OpCtrl[2];
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// choose the ouptut format depending on the opperation
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// - fp -> fp: OpCtrl contains the percision of the output
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// - int -> fp: Fmt contains the percision of the output
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if (`FPSIZES == 2)
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assign OutFmt = IntToFp ? Fmt : (OpCtrl[1:0] == `FMT);
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else if (`FPSIZES == 3 | `FPSIZES == 4)
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assign OutFmt = IntToFp ? Fmt : OpCtrl[1:0];
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///////////////////////////////////////////////////////////////////////////
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// negation
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///////////////////////////////////////////////////////////////////////////
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// 1) negate the input if the input is a negitive singed integer
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// 2) trim the input to the proper size (kill the 32 most significant zeroes if needed)
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assign PosInt = Cs ? -Int : Int;
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assign TrimInt = {{`XLEN-32{Int64}}, {32{1'b1}}} & PosInt;
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assign IntZero = ~|TrimInt;
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///////////////////////////////////////////////////////////////////////////
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// lzc
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///////////////////////////////////////////////////////////////////////////
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// choose the input to the leading zero counter i.e. priority encoder
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// int -> fp : | positive integer | 00000... (if needed) |
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// fp -> fp : | fraction | 00000... (if needed) |
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assign LzcInFull = IntToFp ? {TrimInt, {`CVTLEN-`XLEN+1{1'b0}}} :
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{Xm, {`CVTLEN-`NF{1'b0}}};
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// used as shifter input in postprocessor
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assign LzcIn = LzcInFull[`CVTLEN-1:0];
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lzc #(`CVTLEN+1) lzc (.num(LzcInFull), .ZeroCnt(LeadingZeros));
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///////////////////////////////////////////////////////////////////////////
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// exp calculations
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///////////////////////////////////////////////////////////////////////////
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// Select the bias of the output
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// fp -> int : select 1
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// ??? -> fp : pick the new bias depending on the output format
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if (`FPSIZES == 1) begin
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assign NewBias = ToInt ? (`NE-1)'(1) : (`NE-1)'(`BIAS);
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end else if (`FPSIZES == 2) begin
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logic [`NE-2:0] NewBiasToFp;
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assign NewBiasToFp = OutFmt ? (`NE-1)'(`BIAS) : (`NE-1)'(`BIAS1);
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assign NewBias = ToInt ? (`NE-1)'(1) : NewBiasToFp;
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end else if (`FPSIZES == 3) begin
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logic [`NE-2:0] NewBiasToFp;
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always_comb
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case (OutFmt)
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`FMT: NewBiasToFp = (`NE-1)'(`BIAS);
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`FMT1: NewBiasToFp = (`NE-1)'(`BIAS1);
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`FMT2: NewBiasToFp = (`NE-1)'(`BIAS2);
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default: NewBiasToFp = {`NE-1{1'bx}};
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endcase
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assign NewBias = ToInt ? (`NE-1)'(1) : NewBiasToFp;
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end else if (`FPSIZES == 4) begin
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logic [`NE-2:0] NewBiasToFp;
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always_comb
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case (OutFmt)
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2'h3: NewBiasToFp = (`NE-1)'(`Q_BIAS);
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2'h1: NewBiasToFp = (`NE-1)'(`D_BIAS);
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2'h0: NewBiasToFp = (`NE-1)'(`S_BIAS);
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2'h2: NewBiasToFp = (`NE-1)'(`H_BIAS);
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endcase
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assign NewBias = ToInt ? (`NE-1)'(1) : NewBiasToFp;
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end
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// select the old exponent
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// int -> fp : largest bias + XLEN-1
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// fp -> ??? : XExp
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assign OldExp = IntToFp ? (`NE)'(`BIAS)+(`NE)'(`XLEN-1) : Xe;
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// calculate CalcExp
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// fp -> fp :
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// - XExp - Largest bias + new bias - (LeadingZeros+1)
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// only do ^ if the input was subnormal
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// - convert the expoenent to the final preciaion (Exp - oldBias + newBias)
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// - correct the expoent when there is a normalization shift ( + LeadingZeros+1)
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// - the plus 1 is built into the leading zeros by counting the leading zeroes in the mantissa rather than the fraction
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// fp -> int : XExp - Largest Bias + 1 - (LeadingZeros+1)
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// | `XLEN zeros | Mantissa | 0's if nessisary | << CalcExp
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// process:
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// - start
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// | `XLEN zeros | Mantissa | 0's if nessisary |
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//
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// - shift left 1 (1)
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// | `XLEN-1 zeros |bit| frac | 0's if nessisary |
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// . <- binary point
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//
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// - shift left till unbiased exponent is 0 (XExp - Largest Bias)
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// | 0's | Mantissa | 0's if nessisary |
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// | keep |
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//
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// - if the input is subnormal then we dont shift... so the "- LeadingZeros" is just leftovers from other options
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// int -> fp : largest bias + XLEN-1 - Largest bias + new bias - LeadingZeros = XLEN-1 + NewBias - LeadingZeros
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// Process:
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// |XLEN|.0000
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// - shifted right by XLEN (XLEN)
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// 000000.|XLEN|
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// - shift left to normilize (-LeadingZeros)
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// 000000.1...
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// - shift left 1 to normalize
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// 000001.stuff
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// - newBias to make the biased exponent
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//
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// oldexp - biasold - LeadingZeros + newbias
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assign Ce = {1'b0, OldExp} - (`NE+1)'(`BIAS) - {{`NE-`LOGCVTLEN+1{1'b0}}, (LeadingZeros)} + {2'b0, NewBias};
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// find if the result is dnormal or underflows
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// - if Calculated expoenent is 0 or negitive (and the input/result is not exactaly 0)
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// - can't underflow an integer to Fp conversion
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assign ResSubnormUf = (~|Ce | Ce[`NE])&~XZero&~IntToFp;
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///////////////////////////////////////////////////////////////////////////
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// shifter
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///////////////////////////////////////////////////////////////////////////
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// kill the shift if it's negitive
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// select the amount to shift by
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// fp -> int:
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// - shift left by CalcExp - essentially shifting until the unbiased exponent = 0
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// - don't shift if supposed to shift right (underflowed or Subnorm input)
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// subnormal/undeflowed result fp -> fp:
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// - shift left by NF-1+CalcExp - to shift till the biased expoenent is 0
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// ??? -> fp:
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// - shift left by LeadingZeros - to shift till the result is normalized
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// - only shift fp -> fp if the intital value is subnormal
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// - this is a problem because the input to the lzc was the fraction rather than the mantissa
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// - rather have a few and-gates than an extra bit in the priority encoder??? *** is this true?
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always_comb
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if(ToInt) ShiftAmt = Ce[`LOGCVTLEN-1:0]&{`LOGCVTLEN{~Ce[`NE]}};
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else if (ResSubnormUf) ShiftAmt = (`LOGCVTLEN)'(`NF-1)+Ce[`LOGCVTLEN-1:0];
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else ShiftAmt = LeadingZeros;
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///////////////////////////////////////////////////////////////////////////
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// sign
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///////////////////////////////////////////////////////////////////////////
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// determine the sign of the result
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// - if int -> fp
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// - if 64-bit : check the msb of the 64-bit integer input and if it's signed
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// - if 32-bit : check the msb of the 32-bit integer input and if it's signed
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// - otherwise: the floating point input's sign
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always_comb
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if(IntToFp)
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if(Int64) Cs = Int[`XLEN-1]&Signed;
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else Cs = Int[31]&Signed;
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else Cs = Xs;
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endmodule
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