cturek cc6f219bdd Added A Sign register. Fixed postprocessing logic for postinc and rem calculation.		2022-12-24 06:46:52 +00:00
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config
misc
regression	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2022-12-23 19:51:23 -06:00
src	Added A Sign register. Fixed postprocessing logic for postinc and rem calculation.	2022-12-24 06:46:52 +00:00
testbench	reworked negitive sticky bit handeling in fma	2022-12-23 17:01:34 -06:00