Noah Boorstin c75455cc41 busybear testbench updates ... start speculative checking on CSR* satp, * add some slight delays in some CSR checkings to make them deterministic I realize this verilog is incredibly un-idiomatic. But I still don't know of anything better. If you figure it out, please let me know		2021-04-14 00:00:27 -04:00
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function_radix.sv	Added possibly working OSU test bench as a precursor to running a bp benchmark.	2021-03-17 11:06:32 -05:00
testbench-busybear.sv	busybear testbench updates	2021-04-14 00:00:27 -04:00
testbench-coremark_bare.sv	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-03-30 15:25:07 -04:00
testbench-coremark.sv	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-03-30 15:25:07 -04:00
testbench-imperas.sv	integrated peripheral testing into existing workflow	2021-04-08 15:31:39 -04:00
testbench-peripherals.sv	Yee hoo first draft of PLIC plus self-checking tests	2021-04-04 06:40:53 -04:00
testbench-privileged.sv	Add mcause tests to testbench	2021-03-30 17:17:59 -04:00