forked from Github_Repos/cvw
137 lines
4.1 KiB
ArmAsm
137 lines
4.1 KiB
ArmAsm
///////////////////////////////////////////
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// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLTU.S
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// David_Harris@hmc.edu & Katherine Parry
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// Created 2022-01-27 08:08:42.393741//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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#include "model_test.h"
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#include "arch_test.h"
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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RVTEST_SIGBASE( x6, wally_signature)
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# Testcase 0: rs1:x20(0x00000000), rs2:x26(0x00000000), result rd:x13(0x00000000)
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li x20, MASK_XLEN(0x00000000)
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li x26, MASK_XLEN(0x00000000)
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SLTU x13, x20, x26
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sw x13, 0(x6)
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# Testcase 1: rs1:x11(0x00000000), rs2:x19(0x00000001), result rd:x8(0x00000001)
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li x11, MASK_XLEN(0x00000000)
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li x19, MASK_XLEN(0x00000001)
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SLTU x8, x11, x19
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sw x8, 4(x6)
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# Testcase 2: rs1:x20(0x00000000), rs2:x22(0xffffffff), result rd:x9(0x00000001)
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li x20, MASK_XLEN(0x00000000)
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li x22, MASK_XLEN(0xffffffff)
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SLTU x9, x20, x22
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sw x9, 8(x6)
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# Testcase 3: rs1:x16(0x00000001), rs2:x3(0x00000000), result rd:x3(0x00000000)
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li x16, MASK_XLEN(0x00000001)
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li x3, MASK_XLEN(0x00000000)
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SLTU x3, x16, x3
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sw x3, 12(x6)
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# Testcase 4: rs1:x22(0x00000001), rs2:x25(0x00000001), result rd:x5(0x00000000)
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li x22, MASK_XLEN(0x00000001)
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li x25, MASK_XLEN(0x00000001)
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SLTU x5, x22, x25
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sw x5, 16(x6)
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# Testcase 5: rs1:x29(0x00000001), rs2:x5(0xffffffff), result rd:x30(0x00000001)
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li x29, MASK_XLEN(0x00000001)
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li x5, MASK_XLEN(0xffffffff)
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SLTU x30, x29, x5
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sw x30, 20(x6)
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# Testcase 6: rs1:x2(0xffffffff), rs2:x27(0x00000000), result rd:x3(0x00000000)
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li x2, MASK_XLEN(0xffffffff)
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li x27, MASK_XLEN(0x00000000)
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SLTU x3, x2, x27
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sw x3, 24(x6)
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# Testcase 7: rs1:x29(0xffffffff), rs2:x23(0x00000001), result rd:x30(0x00000000)
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li x29, MASK_XLEN(0xffffffff)
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li x23, MASK_XLEN(0x00000001)
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SLTU x30, x29, x23
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sw x30, 28(x6)
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# Testcase 8: rs1:x27(0xffffffff), rs2:x18(0xffffffff), result rd:x22(0x00000000)
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li x27, MASK_XLEN(0xffffffff)
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li x18, MASK_XLEN(0xffffffff)
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SLTU x22, x27, x18
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sw x22, 32(x6)
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# Testcase 9: rs1:x23(0x642bfa42), rs2:x17(0xd67e55fd), result rd:x9(0x00000001)
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li x23, MASK_XLEN(0x642bfa42)
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li x17, MASK_XLEN(0xd67e55fd)
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SLTU x9, x23, x17
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sw x9, 36(x6)
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# Testcase 10: rs1:x8(0x85940927), rs2:x28(0xcfc6e625), result rd:x7(0x00000001)
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li x8, MASK_XLEN(0x85940927)
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li x28, MASK_XLEN(0xcfc6e625)
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SLTU x7, x8, x28
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sw x7, 40(x6)
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# Testcase 11: rs1:x19(0xe5214606), rs2:x27(0xadf20806), result rd:x31(0x00000000)
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li x19, MASK_XLEN(0xe5214606)
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li x27, MASK_XLEN(0xadf20806)
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SLTU x31, x19, x27
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sw x31, 44(x6)
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.EQU NUMTESTS,12
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RVTEST_CODE_END
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RVMODEL_HALT
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RVTEST_DATA_BEGIN
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.align 4
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rvtest_data:
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.word 0x98765432
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RVTEST_DATA_END
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RVMODEL_DATA_BEGIN
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wally_signature:
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.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
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#ifdef rvtest_mtrap_routine
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mtrap_sigptr:
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.fill 64*(XLEN/32),4,0xdeadbeef
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#endif
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#ifdef rvtest_gpr_save
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gpr_save:
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.fill 32*(XLEN/32),4,0xdeadbeef
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#endif
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RVMODEL_DATA_END
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// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SLTU.S
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// David_Harris@hmc.edu & Katherine Parry
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