..
slack-notifier
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wave-dos
Renamed wallypipelinedhart to wallypipelinedcore
2022-01-20 16:02:08 +00:00
buildrootBugFinder.py
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
fpga-wave.do
Updated wave.do to match the ifu/lsu changes.
2022-01-28 14:37:15 -06:00
lint-wally
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
linux-wave.do
Repaired linux-wave.do
2022-01-31 12:54:18 -06:00
make-tests.sh
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
Makefile
Completed makefile updates to accelerate the generation of memfiles. There are two makefiles in the
2022-02-03 08:32:48 -06:00
makefile-memfile
Completed makefile updates to accelerate the generation of memfiles. There are two makefiles in the
2022-02-03 08:32:48 -06:00
regression-wally
Config file & wally-riscv-arch-test cleanup
2022-02-02 16:35:52 +00:00
sim-buildroot
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
sim-buildroot-batch
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
sim-coremark-batch
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
sim-fp64
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
sim-fp64-batch
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
sim-wally
LSU Cleanup
2022-01-15 01:11:17 +00:00
sim-wally-batch
Renamed LSUStall to LSUStallM
2022-01-15 00:24:16 +00:00
wally-buildroot-batch.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-buildroot.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-coremark.do
Improve wavefile by adding performance counters.
2022-01-12 10:53:29 -06:00
wally-fp64-batch.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-fp64.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-harvard.do
Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.
2022-01-13 22:21:43 -06:00
wally-pipelined-batch.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-pipelined-fpga.do
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
wally-pipelined-tim-batch.do
Added tim only test to regression-wally. Minor cleanup to ifu.
2022-01-14 11:13:06 -06:00
wally-pipelined-tim.do
Added tim only test to regression-wally. Minor cleanup to ifu.
2022-01-14 11:13:06 -06:00
wally-pipelined.do
Improved function_radix to not printout warnings when no valid function is found.
2022-02-01 18:03:09 -06:00
wave-all.do
Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.
2022-01-27 17:11:27 -06:00
wave-coremark.do
Updated wave.do to match the ifu/lsu changes.
2022-01-28 14:37:15 -06:00
wave.do
Added helpful signals to wavefile.
2022-02-02 10:15:54 -06:00
c34907c95b