Xavi/cvw
1
0
Fork 0
forked from Github_Repos/cvw
Code Issues Pull Requests Packages Projects Releases Wiki Activity
Configurable RISC-V Processor
1,511 Commits 14 Branches 1 Tag 31 MiB
Assembly 55.4%
C 27.2%
SystemVerilog 8.2%
Python 2.7%
Stata 2.3%
Other 4.2%
b9081e514c
Go to file
Katherine Parry b9081e514c FMA parameterized
2021-07-20 22:04:21 -04:00
riscv-coremark Updated location to find compiler for coremark 2021-07-16 19:13:18 -04:00
testsBP
wally-pipelined FMA parameterized 2021-07-20 22:04:21 -04:00
.gitattributes
.gitignore separated buildroot debugging from buildroot logging 2021-07-17 14:52:34 -04:00
.gitmodules
LICENSE
README.md

README.md

riscv-wally

Configurable RISC-V Processor