forked from Github_Repos/cvw
43 lines
1.7 KiB
ArmAsm
43 lines
1.7 KiB
ArmAsm
///////////////////////////////////////////
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// badinstr.S
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//
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// Written: David_Harris@hmc.edu 21 March 2023
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//
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// Purpose: Test illegal instruction opcodes
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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//
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// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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// load code to initalize stack, handle interrupts, terminate
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#include "WALLY-init-lib.h"
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main:
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.word 0x00000033 // legal R-type instruction
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.word 0x80000033 // illegal R-type instruction
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.word 0x00007003 // illegal Load instruction
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.word 0x80005013 // illegal I-type instruction: srli: op = 0010011, funct3 = 101, funct7 = 1000000
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.word 0x00000000 // illegal instruction
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.word 0x0000701B // Illegal IW instruction
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.word 0x00004023 // Illegal store instruction
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.word 0x0400003B // Illegal RW or MulDivW instruction
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.word 0x00007067 // Illegal JALR instruction
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.word 0x00002063 // Illegal branch instruction
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j done
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