This website requires JavaScript.
Explore
Help
Register
Sign In
Xavi
/
cvw
Watch
1
Star
0
Fork
0
You've already forked cvw
forked from
Github_Repos/cvw
Code
Issues
Pull Requests
Packages
Projects
Releases
Wiki
Activity
adb4e30c45
cvw
/
pipelined
History
Ross Thompson
adb4e30c45
Missed the force on uart for no tracking.
2022-04-12 19:37:44 -05:00
..
config
Added missing ZFH macro to new configs
2022-04-06 07:13:51 +00:00
misc
Renamed wally-pipelined to pipelined
2022-01-04 19:47:41 +00:00
regression
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2022-04-10 13:41:27 -05:00
src
Possible fix for trap concurent with xret. Fixes the priority so trap has higher priority than either sret or mret. Previous code had priority to xret in the trap logic and privilege logic, but not the csrsr logic. This caused partial execution of the instruction.
2022-04-07 16:56:28 -05:00
srt
Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath
2022-02-28 20:50:51 +00:00
testbench
Missed the force on uart for no tracking.
2022-04-12 19:37:44 -05:00
Home