cvw/fpga/constraints
2023-04-17 20:05:59 -05:00
..
artyddr3.ucf
constraints-ArtyA7.xdc Improved constraints and set ddr3 voltage to correct 1.35V. This voltage is only for synthesis. However I'm concerned because the gui did not let me select 1.35V. 2023-04-17 20:05:59 -05:00
constraints-vcu108.xdc
constraints-vcu118.xdc
debug2.xdc
debug4.xdc
marked_debug.txt
small-debug.xdc
test.file