cvw/pipelined/config/rv32gc
2022-01-13 22:21:43 -06:00
..
BTBPredictor.txt
twoBitPredictor.txt
wally-config.vh Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon. 2022-01-13 22:21:43 -06:00