Ross Thompson a88543275f Added degree of freedom to cache/sram. The sram width in bits is no longer defined by XLEN, but instead a separate parameter. This is decoupled from LINELEN, XLEN, and WORDLEN.		2022-07-17 21:05:31 -05:00
..
common	Added WFI to the testbench instruction name decoder	2022-04-14 17:12:11 +00:00
fp	generating all testfloat vectors	2022-04-04 17:17:12 +00:00
sdc	Replaced || and && with | and &	2022-01-31 01:07:35 +00:00
testbench-fp.sv	merged floating-point radix-2 divider with radix-4	2022-07-15 20:16:59 +00:00
testbench-fpga.sv	Updated the fpga test bench.	2022-04-01 17:14:47 -05:00
testbench-linux.sv	added fld in rv32 - needs testing	2022-06-20 22:53:13 +00:00
testbench.sv	Added degree of freedom to cache/sram. The sram width in bits is no longer defined by XLEN, but instead a separate parameter. This is decoupled from LINELEN, XLEN, and WORDLEN.	2022-07-17 21:05:31 -05:00
tests-fp.vh	postprocessing unit created and passing all tests	2022-06-13 22:47:51 +00:00
tests.vh	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally	2022-07-12 22:37:20 +00:00