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98b824c4c4
cvw
/
pipelined
/
testbench
History
Ross Thompson
98b824c4c4
Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
2022-12-22 22:51:33 -06:00
..
common
Added WFI to the testbench instruction name decoder
2022-04-14 17:12:11 +00:00
fp
Revert "Changed weird D sizing. Better names in preproc. Finalized Int/Float input to divider."
2022-12-04 00:01:58 +00:00
sdc
Replaced || and && with | and &
2022-01-31 01:07:35 +00:00
testbench-fp.sv
Updated testbench/wave for fdivsqrt new start signals
2022-11-22 22:22:26 +00:00
testbench-linux.sv
Renamed signals in the LSU.
2022-09-13 11:47:39 -05:00
testbench.sv
Closing in on icache flushed by FlushD rather than TrapM.
2022-12-22 20:19:09 -06:00
tests-fp.vh
postprocessing unit created and passing all tests
2022-06-13 22:47:51 +00:00
tests.vh
Added status.tvm bit test that passes make and regression
2022-12-22 14:43:22 -08:00
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