forked from Github_Repos/cvw
d8ac9034b7
Test program is currently failing on ovpsim. There is no indication that ovpsim is properly implementing virtual memory translation when satp is set accordingly. Need to confirm whether this is a problem with ovpsim, how ovpsim is being called, or the test itself.
285 lines
8.9 KiB
Python
285 lines
8.9 KiB
Python
#!/usr/bin/python3
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##################################
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# testgen-VIRTUALMEMORY.py
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#
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# Jessica Torrey <jtorrey@hmc.edu> 01 March 2021
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# Thomas Fleming <tfleming@hmc.edu> 01 March 2021
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#
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# Generate an ad-hoc test program for RISC-V Design Validation. Tests the
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# functionality of the memory management unit (MMU).
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##################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint, seed, getrandbits
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from textwrap import dedent
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from virtual_memory_util import *
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##################################
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# global structures
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##################################
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testcase_num = 0
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signature_len = 2000
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signature = [0xff for _ in range(signature_len)]
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##################################
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# functions
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##################################
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def rand_reg():
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"""
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Produce a random register from 1 to 31 (skipping 6, since r6 is used for
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other things).
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"""
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r = randint(1,30)
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if r >= 6:
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r += 1
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return r
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def rand_regs():
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"""
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Generate two random, unequal register numbers (skipping x6).
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"""
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rs1 = rand_reg()
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rs2 = rand_reg()
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while rs1 == rs2:
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rs2 = rand_reg()
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return rs1, rs2
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def initialize_page_directory()
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def generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta):
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"""
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Create assembly code for a given STORE test case, returned as a string.
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Generates an `xlen`-bit test case for `instruction` (one of sb, sh, sw, or
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sd) that loads `value` into `value_register`, then attempts to store that
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value in memory at address (x6 + `base_delta`). The test case
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assumes the current base address for the signature is in register x6.
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The form of the STORE instruction is as follows:
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`instruction` `value_register` `offset`(`addr_register`)
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"""
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global testcase_num
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hex_value = f"{value:0{xlen // 4}x}"
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data = f"""# Testcase {testcase_num}: source: x{value_register} (value 0x{hex_value}), destination: {offset}(x{addr_register}) ({base_delta} bytes into signature)
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addi x{addr_register}, x6, {base_delta}
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li x{value_register}, MASK_XLEN({-offset})
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add x{addr_register}, x{addr_register}, x{value_register}
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li x{value_register}, 0x{hex_value}
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{instruction} x{value_register}, {offset}(x{addr_register})
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"""
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#update_signature(store_to_size[instruction], value, base_delta)
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testcase_num += 1
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return data
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def validate_memory(scratch_register, value_register, value, base_delta, length):
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"""
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Create assembly code to verify that `length` bytes at mem[x6 + `base_delta`]
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store `value`.
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Assumes x6 stores the current base address for the signature.
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"""
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truncated_value = value & (2**(length * 8) - 1)
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hex_value = f"{truncated_value:0{length * 2}x}"
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load = size_to_load[length]
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data = f"""addi x{scratch_register}, x6, {base_delta}
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{load} x{value_register}, 0(x{scratch_register})
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RVTEST_IO_ASSERT_GPR_EQ(x{scratch_register}, x{value_register}, 0x{hex_value})
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"""
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return data
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def update_signature(length, value, base_delta):
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"""
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Write the lower `length` bytes of `value` to the little-endian signature
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array, starting at byte `base_delta`.
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"""
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truncated_value = value & (2**(length * 8) - 1)
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value_bytes = truncated_value.to_bytes(length, 'little')
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#print("n: {}, value: {:x}, trunc: {:x}, length: {}, bd: {:x}".format(testcase_num, value, truncated_value, length, base_delta))
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for i in range(length):
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signature[base_delta + i] = value_bytes[i]
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def write_signature(outfile):
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"""
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Writes successive 32-bit words from the signature array into a given file.
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"""
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for i in range(0, signature_len, 4):
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word = list(reversed(signature[i:i+4]))
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hexword = bytearray(word).hex()
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outfile.write(f"{hexword}\n")
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def write_header(outfile):
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"""
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Write the name of the test file, authors, and creation date.
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"""
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outfile.write(dedent(f"""\
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///////////////////////////////////////////
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//
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// WALLY-STORE
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//
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// Author: {author}
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//
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// Created {str(datetime.now())}
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"""))
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outfile.write(open("testgen_header.S", "r").read())
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def write_footer(outfile):
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"""
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Write necessary closing code, including a data section for the signature.
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"""
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outfile.write(open("testgen_footer.S", 'r').read())
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data_section = dedent(f"""\
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\t.fill {signature_len}, 1, -1
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RV_COMPLIANCE_DATA_END
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""")
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outfile.write(data_section)
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##################################
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# test cases
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##################################
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def write_basic_tests(outfile, xlen, instr_len, num, base_delta):
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"""
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Test basic functionality of STORE, using random registers, offsets, and
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values.
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Creates `num` tests for a single store instruction of length `instr_len`,
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writing to memory at consecutive locations, starting `base_delta` bytes from
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the start of the signature.
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Returns the number of bytes from the start of the signature where testing
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ended.
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"""
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instruction = size_to_store[instr_len]
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for i in range(num):
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value_register, addr_register = rand_regs()
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offset = randint(-2**(12 - 1), 2**(12 - 1) - 1)
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value = randint(0, 2**(instr_len * 8) - 1)
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test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
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validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
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outfile.write(test)
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outfile.write(validate)
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base_delta += instr_len
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return base_delta
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def write_random_store_tests(outfile, xlen, instr_len, num, min_base_delta):
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"""
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Test random access of STORE, using random registers, offsets, values, and
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memory locations.
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Creates `num` tests for a single store instruction of length `instr_len`,
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writing to memory at random locations between `min_base_delta` bytes past
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the start of the signature to the end of the signature.
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"""
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instruction = size_to_store[instr_len]
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for i in range(num):
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base_delta = randint(min_base_delta, signature_len - 1)
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base_delta -= (base_delta % instr_len)
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value_register, addr_register = rand_regs()
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offset = randint(-2**(12 - 1), 2**(12 - 1) - 1)
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value = randint(0, 2**(instr_len * 8) - 1)
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test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
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validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
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outfile.write(test)
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outfile.write(validate)
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def write_repeated_store_tests(outfile, xlen, instr_len, num, base_delta):
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"""
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Test repeated access of STORE, using random registers, offsets, values, and a
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single memory location.
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Creates `num` tests for a single store instruction of length `instr_len`,
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writing to memory `base_delta` bytes past the start of the signature.
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"""
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instruction = size_to_store[instr_len]
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for i in range(num):
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value_register, addr_register = rand_regs()
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offset = 0
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value = (1 << ((2 * i) % xlen))
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test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
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validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
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outfile.write(test)
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outfile.write(validate)
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def write_corner_case_tests(outfile, xlen, instr_len, base_delta):
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instruction = size_to_store[instr_len]
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corner_cases_32 = [0x0, 0x10000001, 0x01111111]
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corner_cases_64 = [0x1000000000000001, 0x0111111111111111]
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corner_cases = corner_cases_32
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if xlen == 64:
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corner_cases += corner_cases_64
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for offset in corner_cases:
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for value in corner_cases:
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value_register, addr_register = rand_regs()
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test = generate_case(xlen, instruction, value_register, value, addr_register, offset, base_delta)
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validate = validate_memory(addr_register, value_register, value, base_delta, instr_len)
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outfile.write(test)
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outfile.write(validate)
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base_delta += instr_len
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return base_delta
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##################################
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# main body
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##################################
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if __name__ == "__main__":
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instructions = ["sd", "sw", "sh", "sb"]
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author = "Jessica Torrey <jtorrey@hmc.edu> & Thomas Fleming <tfleming@hmc.edu>"
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xlens = [32, 64]
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numrand = 100
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# setup
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seed(0) # make tests reproducible
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for xlen in xlens:
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if (xlen == 32):
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wordsize = 4
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else:
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wordsize = 8
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fname = f"../../imperas-riscv-tests/riscv-test-suite/rv{xlen}i/src/WALLY-VIRTUALMEMORY.S"
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refname = f"../../imperas-riscv-tests/riscv-test-suite/rv{xlen}i/references/WALLY-VIRTUALMEMORY.reference_output"
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f = open(fname, "w")
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r = open(refname, "w")
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write_header(f)
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base_delta = 0
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for instruction in instructions:
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if xlen == 32 and instruction == 'sd':
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continue
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instr_len = store_to_size[instruction]
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base_delta = write_basic_tests(f, xlen, instr_len, 5, base_delta)
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write_repeated_store_tests(f, xlen, instr_len, 32, base_delta)
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write_random_store_tests(f, xlen, instr_len, 5, base_delta + wordsize)
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write_footer(f)
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write_signature(r)
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f.close()
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r.close()
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# Reset testcase_num and signature
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testcase_num = 0
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signature = [0xff for _ in range(signature_len)] |