Ross Thompson 955ddcfbe1 Fixed bug in the top level of fpga verilog.		2021-12-03 17:55:36 -06:00
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constraints	Fixed a bunch of fpga issues.	2021-12-03 17:47:54 -06:00
generator	Fixed a bunch of fpga issues.	2021-12-03 17:47:54 -06:00
sim
src	Fixed bug in the top level of fpga verilog.	2021-12-03 17:55:36 -06:00