Ross Thompson 0b1e59d075 Updated Dcache to fully support flush. This appears to work. ... Updated PCNextF so it points to the correct PC after icache invalidate. Build root crashes with PCW mismatch and invalid register writes.		2021-09-17 10:25:21 -05:00
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bpred.sv	Fixed bugs I introduced to the icache.	2021-08-27 15:00:40 -05:00
BTBPredictor.sv	Corrected a number of bugs in the branch predictor.	2021-03-31 11:54:02 -05:00
decompress.sv	Fixed bug with the compressed immediate generation. Several formats should zero extend.	2021-07-26 11:55:31 -05:00
globalHistoryPredictor.sv	Fixed a few lint errors,	2021-06-02 09:33:24 -05:00
gsharePredictor.sv	Fixed a few lint errors,	2021-06-02 09:33:24 -05:00
ifu.sv	Updated Dcache to fully support flush. This appears to work.	2021-09-17 10:25:21 -05:00
localHistoryPredictor.sv	Gave names to for loops in generate blocks for ease of reference	2021-07-04 18:52:16 -04:00
RAsPredictor.sv	Corrected a number of bugs in the branch predictor.	2021-03-31 11:54:02 -05:00
satCounter2.sv	We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS.	2021-02-15 14:51:39 -06:00
SRAM2P1R1W.sv	Gave names to for loops in generate blocks for ease of reference	2021-07-04 18:52:16 -04:00
twoBitPredictor.sv	Fixed bug in the two bit sat counter branch predictor. The SRAM needs to be read enabled by StallF.	2021-05-24 23:24:54 -05:00