forked from Github_Repos/cvw
76 lines
2.6 KiB
ArmAsm
76 lines
2.6 KiB
ArmAsm
///////////////////////////////////////////
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//
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// WALLY-status-floating-point
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//
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// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
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//
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// Created 2022-04-24
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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#include "WALLY-TEST-LIB-32.h"
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RVTEST_ISA("RV32IAF")
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RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*A.*F.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",status-fp-enabled)
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INIT_TESTS
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// Set the FS bits to 01, This makes sure SAILs mstatus matches wally in the signature
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li x29, 0x00002000
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csrw mstatus, x29
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TRAP_HANDLER m
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// Misa.F is already 1 in this config, making floating point enabled
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li x28, 0x80006000 // mask bits for SD and FS bits of status csr
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csrr x29, mstatus
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and x29, x29, x28
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sw x29, 0(x6) // read initial FS, SD bits, which should be 01 and 0 respectively
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addi x6, x6, 4
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addi x16, x16, 4
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flw f1, 0(x6) // make FS dirty by loading random value in
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csrr x29, mstatus
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and x29, x29, x28
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sw x29, 0(x6) // read dirty FS, SD bits, which should be 11 and 1 respectively
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addi x6, x6, 4
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addi x16, x16, 4
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li x29, 0x4000
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csrs mstatus, x29
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li x29, 0x80002000
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csrc mstatus, x29 // set SD to 0 and FS to 10 by writing mstatus
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csrr x29, mstatus
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and x29, x29, x28
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sw x29, 0(x6) // read written FS, SD bits to confirm previous write
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addi x6, x6, 4
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addi x16, x16, 4
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flw f1, 0(x6) // make FS dirty by loading random value in
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csrr x29, mstatus
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and x29, x29, x28
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sw x29, 0(x6) // read dirty FS, SD bits, which should be 11 and 1 respectively
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addi x6, x6, 4
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addi x16, x16, 4
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END_TESTS
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TEST_STACK_AND_DATA |