cvw/pipelined/testbench
2022-07-21 12:47:51 -07:00
..
common Added WFI to the testbench instruction name decoder 2022-04-14 17:12:11 +00:00
fp generating all testfloat vectors 2022-04-04 17:17:12 +00:00
sdc Replaced || and && with | and & 2022-01-31 01:07:35 +00:00
testbench-fp.sv added input enables and improved forwarding 2022-07-21 01:20:06 +00:00
testbench-fpga.sv Updated the fpga test bench. 2022-04-01 17:14:47 -05:00
testbench-linux.sv added fld in rv32 - needs testing 2022-06-20 22:53:13 +00:00
testbench.sv removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes 2022-07-21 12:47:51 -07:00
tests-fp.vh postprocessing unit created and passing all tests 2022-06-13 22:47:51 +00:00
tests.vh removed ugly /ref/Ref from tests.vh, added back d_fsd-align-01.S and d_fld-align-01.S tests to tests.vh, updated makefile to fix the riscof issues and fix fld fsd tests, updated testbench.sv for comptability with changes 2022-07-21 12:47:51 -07:00