forked from Github_Repos/cvw
140 lines
4.6 KiB
ArmAsm
140 lines
4.6 KiB
ArmAsm
///////////////////////////////////////////
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// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-ADD.S
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// David_Harris@hmc.edu & Katherine Parry
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// Created 2022-06-17 22:58:09.914370//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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#include "model_test.h"
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#include "arch_test.h"
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RVTEST_ISA("RV64I")
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.section .text.init
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.globl rvtest_entry_point
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rvtest_entry_point:
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RVMODEL_BOOT
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RVTEST_CODE_BEGIN
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RVTEST_SIGBASE( x6, wally_signature)
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RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",add)
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# Testcase 0: rs1:x20(0x0000000000000000), rs2:x22(0x0000000000000000), result rd:x3(0x0000000000000000)
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li x20, MASK_XLEN(0x0000000000000000)
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li x22, MASK_XLEN(0x0000000000000000)
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ADD x3, x20, x22
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sd x3, 0(x6)
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# Testcase 1: rs1:x1(0x0000000000000000), rs2:x4(0x0000000000000001), result rd:x21(0x0000000000000001)
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li x1, MASK_XLEN(0x0000000000000000)
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li x4, MASK_XLEN(0x0000000000000001)
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ADD x21, x1, x4
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sd x21, 8(x6)
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# Testcase 2: rs1:x7(0x0000000000000000), rs2:x20(0xffffffffffffffff), result rd:x27(0xffffffffffffffff)
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li x7, MASK_XLEN(0x0000000000000000)
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li x20, MASK_XLEN(0xffffffffffffffff)
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ADD x27, x7, x20
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sd x27, 16(x6)
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# Testcase 3: rs1:x19(0x0000000000000001), rs2:x4(0x0000000000000000), result rd:x13(0x0000000000000001)
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li x19, MASK_XLEN(0x0000000000000001)
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li x4, MASK_XLEN(0x0000000000000000)
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ADD x13, x19, x4
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sd x13, 24(x6)
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# Testcase 4: rs1:x3(0x0000000000000001), rs2:x12(0x0000000000000001), result rd:x27(0x0000000000000002)
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li x3, MASK_XLEN(0x0000000000000001)
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li x12, MASK_XLEN(0x0000000000000001)
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ADD x27, x3, x12
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sd x27, 32(x6)
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# Testcase 5: rs1:x4(0x0000000000000001), rs2:x2(0xffffffffffffffff), result rd:x20(0x0000000000000000)
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li x4, MASK_XLEN(0x0000000000000001)
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li x2, MASK_XLEN(0xffffffffffffffff)
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ADD x20, x4, x2
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sd x20, 40(x6)
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# Testcase 6: rs1:x1(0xffffffffffffffff), rs2:x7(0x0000000000000000), result rd:x31(0xffffffffffffffff)
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li x1, MASK_XLEN(0xffffffffffffffff)
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li x7, MASK_XLEN(0x0000000000000000)
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ADD x31, x1, x7
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sd x31, 48(x6)
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# Testcase 7: rs1:x16(0xffffffffffffffff), rs2:x7(0x0000000000000001), result rd:x24(0x0000000000000000)
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li x16, MASK_XLEN(0xffffffffffffffff)
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li x7, MASK_XLEN(0x0000000000000001)
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ADD x24, x16, x7
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sd x24, 56(x6)
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# Testcase 8: rs1:x26(0xffffffffffffffff), rs2:x2(0xffffffffffffffff), result rd:x30(0xfffffffffffffffe)
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li x26, MASK_XLEN(0xffffffffffffffff)
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li x2, MASK_XLEN(0xffffffffffffffff)
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ADD x30, x26, x2
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sd x30, 64(x6)
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# Testcase 9: rs1:x20(0x05d51433ade9b2b4), rs2:x4(0x6cf55b158b53031d), result rd:x27(0x72ca6f49393cb5d1)
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li x20, MASK_XLEN(0x05d51433ade9b2b4)
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li x4, MASK_XLEN(0x6cf55b158b53031d)
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ADD x27, x20, x4
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sd x27, 72(x6)
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# Testcase 10: rs1:x21(0x11ebcd49428a1c22), rs2:x10(0x126cbc8f38884479), result rd:x12(0x245889d87b12609b)
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li x21, MASK_XLEN(0x11ebcd49428a1c22)
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li x10, MASK_XLEN(0x126cbc8f38884479)
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ADD x12, x21, x10
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sd x12, 80(x6)
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# Testcase 11: rs1:x15(0x2e2950656fa231e9), rs2:x2(0x80ee526e0fa07a3f), result rd:x20(0xaf17a2d37f42ac28)
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li x15, MASK_XLEN(0x2e2950656fa231e9)
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li x2, MASK_XLEN(0x80ee526e0fa07a3f)
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ADD x20, x15, x2
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sd x20, 88(x6)
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.EQU NUMTESTS,12
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RVTEST_CODE_END
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RVMODEL_HALT
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RVTEST_DATA_BEGIN
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.align 4
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rvtest_data:
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.word 0x98765432
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RVTEST_DATA_END
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RVMODEL_DATA_BEGIN
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wally_signature:
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.fill NUMTESTS*(XLEN/32),4,0xdeadbeef
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#ifdef rvtest_mtrap_routine
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mtrap_sigptr:
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.fill 64*(XLEN/32),4,0xdeadbeef
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#endif
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#ifdef rvtest_gpr_save
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gpr_save:
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.fill 32*(XLEN/32),4,0xdeadbeef
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#endif
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RVMODEL_DATA_END
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// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-ADD.S
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// David_Harris@hmc.edu & Katherine Parry
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