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6a35308068
cvw
/
wally-pipelined
/
src
/
ieu
History
ushakya22
6b9ae41302
Merge branch 'main' of
https://github.com/davidharrishmc/riscv-wally
into main
2021-03-30 15:25:07 -04:00
..
alu.sv
Moved fpu to temporary location to fix compile and cleaned up interface formatting
2021-02-01 23:44:41 -05:00
controller.sv
removed unnecesary PC registers in ifu
2021-03-18 16:31:21 -04:00
datapath.sv
removed unnecesary PC registers in ifu
2021-03-18 16:31:21 -04:00
extend.sv
Initial (untested) implementation of lr and sc
2021-03-01 00:09:45 -05:00
forward.sv
Merge branch 'main' of
https://github.com/davidharrishmc/riscv-wally
into main
2021-03-30 15:25:07 -04:00
ieu.sv
Merge branch 'main' of
https://github.com/davidharrishmc/riscv-wally
into main
2021-03-30 15:25:07 -04:00
regfile.sv
Moved fpu to temporary location to fix compile and cleaned up interface formatting
2021-02-01 23:44:41 -05:00
shifter.sv
Moved fpu to temporary location to fix compile and cleaned up interface formatting
2021-02-01 23:44:41 -05:00
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