forked from Github_Repos/cvw
68 lines
2.8 KiB
Systemverilog
68 lines
2.8 KiB
Systemverilog
///////////////////////////////////////////////////////////////////////////////
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// Block Name: special.v
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// Author: David Harris
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// Date: 12/2/1995
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//
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// Block Description:
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// This block implements special case handling for unusual operands (e.g.
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// 0, NaN, denormalize, infinity). The block consists of zero/one detectors.
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//
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/////////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////////
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module special(Input1E, Input2E, Input3E, xzeroE, yzeroE, zzeroE,
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xnanE, ynanE, znanE, xdenormE, ydenormE, zdenormE, xinfE, yinfE, zinfE);
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/////////////////////////////////////////////////////////////////////////////
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input logic [63:0] Input1E; // Input Input1E
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input logic [63:0] Input2E; // Input Input2E
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input logic [63:0] Input3E; // Input Input3E
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output logic xzeroE; // Input Input1E = 0
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output logic yzeroE; // Input Input2E = 0
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output logic zzeroE; // Input Input3E = 0
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output logic xnanE; // Input1E is NaN
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output logic ynanE; // Input2E is NaN
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output logic znanE; // Input3E is NaN
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output logic xdenormE; // Input1E is denormalized
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output logic ydenormE; // Input2E is denormalized
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output logic zdenormE; // Input3E is denormalized
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output logic xinfE; // Input1E is infinity
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output logic yinfE; // Input2E is infinity
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output logic zinfE; // Input3E is infinity
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// In the actual circuit design, the gates looking at bits
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// 51:0 and at bits 62:52 should be shared among the various detectors.
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// Check if input is NaN
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assign xnanE = &Input1E[62:52] && |Input1E[51:0];
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assign ynanE = &Input2E[62:52] && |Input2E[51:0];
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assign znanE = &Input3E[62:52] && |Input3E[51:0];
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// Check if input is denormalized
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assign xdenormE = ~(|Input1E[62:52]) && |Input1E[51:0];
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assign ydenormE = ~(|Input2E[62:52]) && |Input2E[51:0];
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assign zdenormE = ~(|Input3E[62:52]) && |Input3E[51:0];
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// Check if input is infinity
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assign xinfE = &Input1E[62:52] && ~(|Input1E[51:0]);
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assign yinfE = &Input2E[62:52] && ~(|Input2E[51:0]);
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assign zinfE = &Input3E[62:52] && ~(|Input3E[51:0]);
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// Check if inputs are all zero
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// Also forces denormalized inputs to zero.
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// In the circuit implementation, this can be optimized
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// to just check if the exponent is zero.
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// KATHERINE - commented following (21/01/11)
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// assign xzeroE = ~(|Input1E[62:0]) || xdenormE;
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// assign yzeroE = ~(|Input2E[62:0]) || ydenormE;
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// assign zzeroE = ~(|Input3E[62:0]) || zdenormE;
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// KATHERINE - removed denorm to prevent output logicing zero when computing with a denormalized number
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assign xzeroE = ~(|Input1E[62:0]);
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assign yzeroE = ~(|Input2E[62:0]);
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assign zzeroE = ~(|Input3E[62:0]);
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endmodule
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