forked from Github_Repos/cvw
195 lines
6.0 KiB
ArmAsm
195 lines
6.0 KiB
ArmAsm
///////////////////////////////////////////
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//
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// WALLY-endianness
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//
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// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
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//
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// Created 2022-09-05
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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#include "WALLY-TEST-LIB-32.h"
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RVTEST_ISA("RV32I")
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RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*); def Drvtest_mtrap_routine=True;def TEST_CASE_1=True;def NO_SAIL=True;",endianness)
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INIT_TESTS
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TRAP_HANDLER m
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// Test 5.3.2.4: testing that accesses to sub-word memory acceses not on a word boundary go
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// correctly with the relevant status bit indicating endianness for each mode.
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// do this by going to each mode with and testing loads with the big endian bit on and off work correctly
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// *** It appears Sail has the MBE, SBE, and UBE bits of mstatus hardwired to zero
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// M Mode little endianness tests:
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xAABBCCDD
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xAABBCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xCCDD
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sh x30, 0(t1) // test store half, should save 0xCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xDD
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sb x30, 0(t1) // test store byte, should save 0xDD
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addi t1, t1, 4
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addi a6, a6, 4
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li x28, 0x20
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csrs 0x310, x28 // turn on big endianness for M mode // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush
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// M mode Big endianness tests
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// In big endian modes, all values are sign extended to the right, rather than left
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xDDCCBBAA
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xDDCCBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xAABB
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sh x30, 0(t1) // test store half, should save 0xBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xAA
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sb x30, 0(t1) // test store byte, should save 0xAA
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addi t1, t1, 4
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addi a6, a6, 4
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li x28, 0x20
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csrc 0x310, x28 // Turn off big endianness for M mode before going into the trap handler // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush
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GOTO_S_MODE
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// S mode Little endian tests
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xAABBCCDD
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xAABBCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xCCDD
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sh x30, 0(t1) // test store half, should save 0xCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xDD
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sb x30, 0(t1) // test store byte, should save 0xDD
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addi t1, t1, 4
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addi a6, a6, 4
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GOTO_M_MODE // Go back to M mode to be able to toggle SBE bit of mstatus
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li x28, 0x10
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csrs 0x310, x28 // turn on big endianness for S mode // using '0x310' instead of mstatush because GCC doesn't recognize just mstatush
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GOTO_S_MODE
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// S mode Big endian tests
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xDDCCBBAA
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xDDCCBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xAABB
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sh x30, 0(t1) // test store half, should save 0xBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xAA
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sb x30, 0(t1) // test store byte, should save 0xAA
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addi t1, t1, 4
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addi a6, a6, 4
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GOTO_U_MODE
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// U mode Little endian tests
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xAABBCCDD
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xAABBCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xCCDD
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sh x30, 0(t1) // test store half, should save 0xCCDD
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xDD
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sb x30, 0(t1) // test store byte, should save 0xDD
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addi t1, t1, 4
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addi a6, a6, 4
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GOTO_M_MODE // go to M mode in order to be able to toggle the UBE bit
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li x28, 0x40
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csrs mstatus, x28 // turn on big endianness for U mode
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GOTO_U_MODE
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// U mode Big endian tests
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li x28, 0xAABBCCDD
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li x29, 0x8000F000
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sw x28, 0(x29) // value stored in memory as 0xDDCCBBAA
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lw x30, 0(x29) // test load word, should read out 0xAABBCCDD
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sw x30, 0(t1) // test store word, should save 0xDDCCBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lh x30, 0(x29) // test load half, should read out 0xAABB
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sh x30, 0(t1) // test store half, should save 0xBBAA
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addi t1, t1, 4
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addi a6, a6, 4
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lb x30, 0(x29) // test load byte, should read out 0xAA
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sb x30, 0(t1) // test store byte, should save 0xAA
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addi t1, t1, 4
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addi a6, a6, 4
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//store_location:
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//.fill
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END_TESTS
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TEST_STACK_AND_DATA |